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PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags

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Depending on the capabilities of the PCI controller/platform, the
PCI-to-PCI bridge emulation behavior might need to be different. For
example, on platforms that use the pci-mvebu code, we currently don't
support prefetchable memory BARs, so the corresponding fields in the
PCI-to-PCI bridge configuration space should be read-only.

To implement this, extend pci_bridge_emul_init() to take a "flags"
argument, with currently one flag supported:

PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR

that will make the prefetchable memory base and limit registers
read-only.

The pci-mvebu and pci-aardvark drivers are updated accordingly.

Fixes: 1f08673eef ("PCI: mvebu: Convert to PCI emulated bridge config space")
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Luis Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
This commit is contained in:
Thomas Petazzoni
2019-02-20 10:48:41 +01:00
committed by Lorenzo Pieralisi
parent 59f81c35e0
commit 33776d0596
4 changed files with 15 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/pci/pci-bridge-emul.c
View File

@@ -267,7 +267,8 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
* (typically at least vendor, device, revision), the ->ops pointer,
* and optionally ->data and ->has_pcie.
*/
int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
unsigned int flags)
{
bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
@@ -295,6 +296,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
}
}
if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
}
return 0;
}