[POWERPC] 85xx: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Tento commit je obsažen v:
Kumar Gala
@@ -1,7 +1,7 @@
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/*
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* MPC8544 DS Device Tree Source
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*
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* Copyright 2007 Freescale Semiconductor Inc.
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* Copyright 2007, 2008 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@@ -9,6 +9,7 @@
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "MPC8544DS";
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compatible = "MPC8544DS", "MPC85xxDS";
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@@ -27,17 +28,17 @@
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};
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cpus {
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#cpus = <1>;
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#cpus = <0x1>;
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8544@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K
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i-cache-size = <8000>; // L1, 32K
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K
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i-cache-size = <0x8000>; // L1, 32K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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@@ -46,7 +47,7 @@
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memory {
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device_type = "memory";
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reg = <00000000 00000000>; // Filled by U-Boot
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reg = <0x0 0x0>; // Filled by U-Boot
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};
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soc8544@e0000000 {
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@@ -54,24 +55,24 @@
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#size-cells = <1>;
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device_type = "soc";
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ranges = <00000000 e0000000 00100000>;
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reg = <e0000000 00001000>; // CCSRBAR 1M
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ranges = <0x0 0xe0000000 0x100000>;
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reg = <0xe0000000 0x1000>; // CCSRBAR 1M
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bus-frequency = <0>; // Filled out by uboot.
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memory-controller@2000 {
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compatible = "fsl,8544-memory-controller";
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reg = <2000 1000>;
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <12 2>;
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interrupts = <18 2>;
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8544-l2-cache-controller";
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reg = <20000 1000>;
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cache-line-size = <20>; // 32 bytes
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cache-size = <40000>; // L2, 256K
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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interrupts = <10 2>;
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interrupts = <16 2>;
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};
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i2c@3000 {
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@@ -79,8 +80,8 @@
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <3000 100>;
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interrupts = <2b 2>;
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reg = <0x3000 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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@@ -90,8 +91,8 @@
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <3100 100>;
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interrupts = <2b 2>;
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reg = <0x3100 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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@@ -100,18 +101,18 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <24520 20>;
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reg = <0x24520 0x20>;
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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interrupts = <a 1>;
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reg = <0>;
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interrupts = <10 1>;
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reg = <0x0>;
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device_type = "ethernet-phy";
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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interrupts = <a 1>;
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reg = <1>;
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interrupts = <10 1>;
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reg = <0x1>;
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device_type = "ethernet-phy";
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};
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};
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@@ -120,40 +121,40 @@
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma";
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reg = <21300 4>;
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ranges = <0 21100 200>;
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reg = <0x21300 0x4>;
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ranges = <0x0 0x21100 0x200>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,mpc8544-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0 80>;
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reg = <0x0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <14 2>;
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interrupts = <20 2>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8544-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <80 80>;
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&mpic>;
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interrupts = <15 2>;
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interrupts = <21 2>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8544-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <100 80>;
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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interrupts = <22 2>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8544-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <180 80>;
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reg = <0x180 0x80>;
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cell-index = <3>;
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interrupt-parent = <&mpic>;
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interrupts = <17 2>;
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interrupts = <23 2>;
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};
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};
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@@ -162,9 +163,9 @@
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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reg = <0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <1d 2 1e 2 22 2>;
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interrupts = <29 2 30 2 34 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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@@ -175,9 +176,9 @@
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <26000 1000>;
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reg = <0x26000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <1f 2 20 2 21 2>;
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interrupts = <31 2 32 2 33 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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@@ -187,9 +188,9 @@
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cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <4500 100>;
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <2a 2>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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@@ -197,15 +198,15 @@
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cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <4600 100>;
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <2a 2>;
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <e0000 1000>;
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reg = <0xe0000 0x1000>;
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fsl,has-rstcr;
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};
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@@ -214,7 +215,7 @@
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <40000 40000>;
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reg = <0x40000 0x40000>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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@@ -225,32 +226,32 @@
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cell-index = <0>;
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compatible = "fsl,mpc8540-pci";
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device_type = "pci";
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 J17 Slot 1 */
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8800 0 0 1 &mpic 2 1
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8800 0 0 2 &mpic 3 1
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8800 0 0 3 &mpic 4 1
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8800 0 0 4 &mpic 1 1
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0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
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0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
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0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
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0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
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/* IDSEL 0x12 J16 Slot 2 */
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9000 0 0 1 &mpic 3 1
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9000 0 0 2 &mpic 4 1
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9000 0 0 3 &mpic 2 1
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9000 0 0 4 &mpic 1 1>;
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0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
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0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
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0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
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0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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bus-range = <0 ff>;
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ranges = <02000000 0 c0000000 c0000000 0 20000000
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01000000 0 00000000 e1000000 0 00010000>;
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clock-frequency = <3f940aa>;
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interrupts = <24 2>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <e0008000 1000>;
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reg = <0xe0008000 0x1000>;
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};
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pci1: pcie@e0009000 {
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@@ -260,33 +261,33 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <e0009000 1000>;
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bus-range = <0 ff>;
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ranges = <02000000 0 80000000 80000000 0 20000000
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01000000 0 00000000 e1010000 0 00010000>;
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clock-frequency = <1fca055>;
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reg = <0xe0009000 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <1a 2>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupts = <26 2>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 4 1
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0000 0 0 2 &mpic 5 1
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0000 0 0 3 &mpic 6 1
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0000 0 0 4 &mpic 7 1
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0000 0x0 0x0 0x1 &mpic 0x4 0x1
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0000 0x0 0x0 0x2 &mpic 0x5 0x1
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0000 0x0 0x0 0x3 &mpic 0x6 0x1
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0000 0x0 0x0 0x4 &mpic 0x7 0x1
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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reg = <0x0 0x0 0x0 0x0 0x0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <02000000 0 80000000
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02000000 0 80000000
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0 20000000
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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01000000 0 00000000
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01000000 0 00000000
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0 00010000>;
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x10000>;
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};
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};
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@@ -297,33 +298,33 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <e000a000 1000>;
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bus-range = <0 ff>;
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ranges = <02000000 0 a0000000 a0000000 0 10000000
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01000000 0 00000000 e1020000 0 00010000>;
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clock-frequency = <1fca055>;
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reg = <0xe000a000 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
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0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <19 2>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupts = <25 2>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 0 1
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0000 0 0 2 &mpic 1 1
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0000 0 0 3 &mpic 2 1
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0000 0 0 4 &mpic 3 1
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0000 0x0 0x0 0x1 &mpic 0x0 0x1
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0000 0x0 0x0 0x2 &mpic 0x1 0x1
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0000 0x0 0x0 0x3 &mpic 0x2 0x1
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0000 0x0 0x0 0x4 &mpic 0x3 0x1
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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reg = <0x0 0x0 0x0 0x0 0x0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <02000000 0 a0000000
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02000000 0 a0000000
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0 10000000
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x10000000
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01000000 0 00000000
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01000000 0 00000000
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0 00010000>;
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x10000>;
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};
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};
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@@ -334,72 +335,72 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <e000b000 1000>;
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bus-range = <0 ff>;
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ranges = <02000000 0 b0000000 b0000000 0 00100000
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01000000 0 00000000 b0100000 0 00100000>;
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clock-frequency = <1fca055>;
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reg = <0xe000b000 0x1000>;
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bus-range = <0 255>;
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ranges = <0x2000000 0x0 0xb0000000 0xb0000000 0x0 0x100000
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0x1000000 0x0 0x0 0xb0100000 0x0 0x100000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <1b 2>;
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interrupt-map-mask = <ff00 0 0 1>;
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interrupts = <27 2>;
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interrupt-map-mask = <0xff00 0x0 0x0 0x1>;
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interrupt-map = <
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// IDSEL 0x1c USB
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e000 0 0 1 &i8259 c 2
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e100 0 0 2 &i8259 9 2
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e200 0 0 3 &i8259 a 2
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e300 0 0 4 &i8259 b 2
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0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
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0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
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0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
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0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
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// IDSEL 0x1d Audio
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e800 0 0 1 &i8259 6 2
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0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
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// IDSEL 0x1e Legacy
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f000 0 0 1 &i8259 7 2
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f100 0 0 1 &i8259 7 2
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0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
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0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
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// IDSEL 0x1f IDE/SATA
|
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f800 0 0 1 &i8259 e 2
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f900 0 0 1 &i8259 5 2
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
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0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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reg = <0x0 0x0 0x0 0x0 0x0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <02000000 0 b0000000
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02000000 0 b0000000
|
||||
0 00100000
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ranges = <0x2000000 0x0 0xb0000000
|
||||
0x2000000 0x0 0xb0000000
|
||||
0x0 0x100000
|
||||
|
||||
01000000 0 00000000
|
||||
01000000 0 00000000
|
||||
0 00100000>;
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
|
||||
uli1575@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <02000000 0 b0000000
|
||||
02000000 0 b0000000
|
||||
0 00100000
|
||||
ranges = <0x2000000 0x0 0xb0000000
|
||||
0x2000000 0x0 0xb0000000
|
||||
0x0 0x100000
|
||||
|
||||
01000000 0 00000000
|
||||
01000000 0 00000000
|
||||
0 00100000>;
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <f000 0 0 0 0>;
|
||||
ranges = <1 0
|
||||
01000000 0 0
|
||||
00001000>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <1 20 2
|
||||
1 a0 2
|
||||
1 4d0 2>;
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
@@ -412,28 +413,28 @@
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <1 60 1 1 64 1>;
|
||||
interrupts = <1 3 c 3>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0>;
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <1>;
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <1 70 2>;
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <1 400 80>;
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
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