drm/radeon/cik: Add macrotile mode array query
This is required to properly calculate the tiling parameters in userspace. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher

parent
1ddce27d8f
commit
32f79a8a82
@@ -2427,6 +2427,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
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gb_tile_moden = 0;
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break;
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}
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rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;
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WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);
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}
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} else if (num_pipe_configs == 4) {
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@@ -2773,6 +2774,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
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gb_tile_moden = 0;
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break;
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}
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rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;
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WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);
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}
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} else if (num_pipe_configs == 2) {
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@@ -2990,6 +2992,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
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gb_tile_moden = 0;
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break;
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}
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rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden;
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WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden);
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}
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} else
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