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irqchip/gic-v3-its: Specialise flush_dcache operation

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It'd be better to switch to CMA... but before that done redirect
flush_dcache operation, so 32-bit implementation could be wired
latter.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Vladimir Murzin
2016-11-02 11:54:05 +00:00
committed by Marc Zyngier
parent d524eaa2a8
commit 328191c05e
2 changed files with 11 additions and 9 deletions
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3
arch/arm64/include/asm/arch_gicv3.h
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@@ -79,6 +79,7 @@
#include <linux/stringify.h>
#include <asm/barrier.h>
#include <asm/cacheflush.h>
#define read_gicreg read_sysreg_s
#define write_gicreg write_sysreg_s
@@ -171,5 +172,7 @@ static inline void gic_write_bpr1(u32 val)
#define gic_read_typer(c) readq_relaxed(c)
#define gic_write_irouter(v, c) writeq_relaxed(v, c)
#define gic_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_GICV3_H */