MIPS: Set `si_code' for SIGFPE signals sent from emulation too
Rework `process_fpemu_return' and move IEEE 754 exception interpretation there, from `do_fpe'. Record the cause bits set in FCSR before they are cleared and pass them through to `process_fpemu_return' so as to set `si_code' correctly too for SIGFPE signals sent from emulation rather than those issued by hardware with the FPE processor exception only. For simplicity `mipsr2_decoder' assumes `*fcr31' has been preinitialised and only sets it to anything if an FPU instruction has been emulated, which in turn is the only case SIGFPE can be issued for here. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle

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443c44032a
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304acb717e
@@ -84,11 +84,16 @@ extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
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#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
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static int mipsr2_emulation;
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static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst) { return 0; };
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static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31)
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{
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return 0;
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};
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#else
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/* MIPS R2 Emulator ON/OFF */
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extern int mipsr2_emulation;
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extern int mipsr2_decoder(struct pt_regs *regs, u32 inst);
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extern int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31);
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#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
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#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
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