drm/i915: Update a bunch of execbuffer helpers to take request structures
Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and i915_emit_box() to take request structures instead of ring or ringbuf/context pairs. For: VIZ-5115 Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Tomas Elf <tomas.elf@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter

parent
1d719cda8b
commit
2f20055d36
@@ -604,10 +604,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
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return 0;
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}
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static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx)
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static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
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{
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struct intel_engine_cs *ring = ringbuf->ring;
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struct intel_engine_cs *ring = req->ring;
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uint32_t flush_domains;
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int ret;
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@@ -615,7 +614,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
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if (ring->gpu_caches_dirty)
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flush_domains = I915_GEM_GPU_DOMAINS;
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ret = ring->emit_flush(ringbuf, ctx,
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ret = ring->emit_flush(req->ringbuf, req->ctx,
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I915_GEM_GPU_DOMAINS, flush_domains);
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if (ret)
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return ret;
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@@ -654,7 +653,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
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/* Unconditionally invalidate gpu caches and ensure that we do flush
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* any residual writes from the previous batch.
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*/
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return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
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return logical_ring_invalidate_all_caches(req);
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}
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int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
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