xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: lse: use generic cpufeature detection for LSE atomics

Browse Source 
Rework the cpufeature detection to support ISAR0 and use that for
detecting the presence of LSE atomics.

Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Will Deacon
2015-07-27 16:23:58 +01:00
parent 0e4a07092f
commit 2e94da1379
2 changed files with 21 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

37
arch/arm64/kernel/cpufeature.c
View File

@@ -31,23 +31,19 @@ feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
return val >= entry->min_field_value; return val >= entry->min_field_value;
} }
static bool #define __ID_FEAT_CHK(reg) \
has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry) static bool __maybe_unused \
{ has_##reg##_feature(const struct arm64_cpu_capabilities *entry) \
u64 val; { \
u64 val; \
val = read_cpuid(id_aa64pfr0_el1); \
return feature_matches(val, entry); val = read_cpuid(reg##_el1); \
return feature_matches(val, entry); \
} }
static bool __maybe_unused __ID_FEAT_CHK(id_aa64pfr0);
has_id_aa64mmfr1_feature(const struct arm64_cpu_capabilities *entry) __ID_FEAT_CHK(id_aa64mmfr1);
{ __ID_FEAT_CHK(id_aa64isar0);
u64 val;
val = read_cpuid(id_aa64mmfr1_el1);
return feature_matches(val, entry);
}
static const struct arm64_cpu_capabilities arm64_features[] = { static const struct arm64_cpu_capabilities arm64_features[] = {
{ {
@@ -67,6 +63,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.enable = cpu_enable_pan, .enable = cpu_enable_pan,
}, },
#endif /* CONFIG_ARM64_PAN */ #endif /* CONFIG_ARM64_PAN */
#if defined(CONFIG_AS_LSE) && defined(CONFIG_ARM64_LSE_ATOMICS)
{
.desc = "LSE atomic instructions",
.capability = ARM64_HAS_LSE_ATOMICS,
.matches = has_id_aa64isar0_feature,
.field_pos = 20,
.min_field_value = 2,
},
#endif /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
{}, {},
}; };
@@ -93,5 +98,5 @@ void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
void check_local_cpu_features(void) void check_local_cpu_features(void)
{ {
check_cpu_capabilities(arm64_features, "detected feature"); check_cpu_capabilities(arm64_features, "detected feature:");
} }

4
arch/arm64/kernel/setup.c
View File

@@ -284,10 +284,6 @@ static void __init setup_processor(void)
default: default:
case 2: case 2:
elf_hwcap |= HWCAP_ATOMICS; elf_hwcap |= HWCAP_ATOMICS;
cpus_set_cap(ARM64_HAS_LSE_ATOMICS);
if (IS_ENABLED(CONFIG_AS_LSE) &&
IS_ENABLED(CONFIG_ARM64_LSE_ATOMICS))
pr_info("LSE atomics supported\n");
case 1: case 1:
/* RESERVED */ /* RESERVED */
case 0: case 0: