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[POWERPC] Make endianess of cfg_addr for indirect pci ops runtime

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Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2007-07-19 16:07:35 -05:00
parent d5269966e5
commit 2e56ff206b
12 changed files with 29 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/powerpc/sysdev/fsl_pci.c
View File

@@ -185,7 +185,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
hose->first_busno = bus_range ? bus_range[0] : 0x0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4);
setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
PPC_INDIRECT_TYPE_BIG_ENDIAN);
setup_pci_cmd(hose);
/* check PCI express link status */

2
arch/powerpc/sysdev/grackle.c
View File

@@ -55,7 +55,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
void __init setup_grackle(struct pci_controller *hose)
{
setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
if (machine_is_compatible("PowerMac1,1"))
pci_assign_all_buses = 1;
if (machine_is_compatible("AAPL,PowerBook1998"))

26
arch/powerpc/sysdev/indirect_pci.c
View File

@@ -20,12 +20,6 @@
#include <asm/pci-bridge.h>
#include <asm/machdep.h>
#ifdef CONFIG_PPC_INDIRECT_PCI_BE
#define PCI_CFG_OUT out_be32
#else
#define PCI_CFG_OUT out_le32
#endif
static int
indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 *val)
@@ -58,9 +52,12 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
else
reg = offset & 0xfc;
PCI_CFG_OUT(hose->cfg_addr,
(0x80000000 | (bus_no << 16)
| (devfn << 8) | reg | cfg_type));
if (hose->indirect_type & PPC_INDIRECT_TYPE_BIG_ENDIAN)
out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
(devfn << 8) | reg | cfg_type));
else
out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
(devfn << 8) | reg | cfg_type));
/*
* Note: the caller has already checked that offset is
@@ -113,9 +110,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
else
reg = offset & 0xfc;
PCI_CFG_OUT(hose->cfg_addr,
(0x80000000 | (bus_no << 16)
| (devfn << 8) | reg | cfg_type));
if (hose->indirect_type & PPC_INDIRECT_TYPE_BIG_ENDIAN)
out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
(devfn << 8) | reg | cfg_type));
else
out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
(devfn << 8) | reg | cfg_type));
/* surpress setting of PCI_PRIMARY_BUS */
if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
@@ -149,7 +149,7 @@ static struct pci_ops indirect_pci_ops =
};
void __init
setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32 flags)
{
unsigned long base = cfg_addr & PAGE_MASK;
void __iomem *mbase;

2
arch/powerpc/sysdev/mv64x60_pci.c
View File

@@ -144,7 +144,7 @@ static int __init mv64x60_add_bridge(struct device_node *dev)
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
setup_indirect_pci(hose, rsrc.start, rsrc.start + 4);
setup_indirect_pci(hose, rsrc.start, rsrc.start + 4, 0);
hose->self_busno = hose->first_busno;
printk(KERN_INFO "Found MV64x60 PCI host bridge at 0x%016llx. "