drm/i915/gen11+: First assume next platforms will inherit stuff
This exactly same approach was already used from gen9 to gen10 and from gen10 to gen11. Let's also use it for gen11+. Let's first assume that we inherit a similar platform and than we apply the differences on top. Different from the previous attempts this will be done this time with coccinelle. We obviously need to exclude some case that is really exclusive for gen11 like PCH, Firmware, and few others. Luckly this was easy to filter by selecting the files we are touching with coccinelle as exposed below: spatch -sp_file gen11\+.cocci --in-place i915_perf.c \ intel_bios.c intel_cdclk.c intel_ddi.c \ intel_device_info.c intel_display.c intel_dpll_mgr.c \ intel_dsi_vbt.c intel_hdmi.c intel_mocs.c intel_color.c @noticelake@ expression e; @@ -!IS_ICELAKE(e) +INTEL_GEN(e) < 11 @notgen11@ expression e; @@ -!IS_GEN(e, 11) +INTEL_GEN(e) < 11 @icelake@ expression e; @@ -IS_ICELAKE(e) +INTEL_GEN(e) >= 11 @gen11@ expression e; @@ -IS_GEN(e, 11) +INTEL_GEN(e) >= 11 No functional change. v2: Remove intel_lrc.c per Tvrtko request since those were w/a for ICL hw issuea and media related configuration. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190308214300.25057-1-rodrigo.vivi@intel.com
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@@ -851,7 +851,7 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
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level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
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if (IS_ICELAKE(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 11) {
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if (intel_port_is_combophy(dev_priv, port))
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icl_get_combo_buf_trans(dev_priv, port, INTEL_OUTPUT_HDMI,
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0, &n_entries);
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@@ -1678,7 +1678,7 @@ static void intel_ddi_clock_get(struct intel_encoder *encoder,
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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if (IS_ICELAKE(dev_priv))
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if (INTEL_GEN(dev_priv) >= 11)
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icl_ddi_clock_get(encoder, pipe_config);
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else if (IS_CANNONLAKE(dev_priv))
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cnl_ddi_clock_get(encoder, pipe_config);
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@@ -2225,7 +2225,7 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder)
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enum port port = encoder->port;
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int n_entries;
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if (IS_ICELAKE(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 11) {
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if (intel_port_is_combophy(dev_priv, port))
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icl_get_combo_buf_trans(dev_priv, port, encoder->type,
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intel_dp->link_rate, &n_entries);
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@@ -2698,7 +2698,7 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp)
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struct intel_encoder *encoder = &dport->base;
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int level = intel_ddi_dp_level(intel_dp);
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if (IS_ICELAKE(dev_priv))
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if (INTEL_GEN(dev_priv) >= 11)
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icl_ddi_vswing_sequence(encoder, intel_dp->link_rate,
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level, encoder->type);
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else if (IS_CANNONLAKE(dev_priv))
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@@ -2867,7 +2867,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
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mutex_lock(&dev_priv->dpll_lock);
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if (IS_ICELAKE(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 11) {
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if (!intel_port_is_combophy(dev_priv, port))
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I915_WRITE(DDI_CLK_SEL(port),
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icl_pll_to_ddi_clk_sel(encoder, crtc_state));
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@@ -2909,7 +2909,7 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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enum port port = encoder->port;
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if (IS_ICELAKE(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 11) {
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if (!intel_port_is_combophy(dev_priv, port))
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I915_WRITE(DDI_CLK_SEL(port), DDI_CLK_SEL_NONE);
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} else if (IS_CANNONLAKE(dev_priv)) {
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@@ -3126,7 +3126,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
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icl_program_mg_dp_mode(dig_port);
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icl_disable_phy_clock_gating(dig_port);
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if (IS_ICELAKE(dev_priv))
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if (INTEL_GEN(dev_priv) >= 11)
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icl_ddi_vswing_sequence(encoder, crtc_state->port_clock,
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level, encoder->type);
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else if (IS_CANNONLAKE(dev_priv))
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@@ -3175,7 +3175,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
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icl_program_mg_dp_mode(dig_port);
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icl_disable_phy_clock_gating(dig_port);
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if (IS_ICELAKE(dev_priv))
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if (INTEL_GEN(dev_priv) >= 11)
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icl_ddi_vswing_sequence(encoder, crtc_state->port_clock,
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level, INTEL_OUTPUT_HDMI);
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else if (IS_CANNONLAKE(dev_priv))
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@@ -3711,7 +3711,7 @@ static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv,
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void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
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struct intel_crtc_state *crtc_state)
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{
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if (IS_ICELAKE(dev_priv) && crtc_state->port_clock > 594000)
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if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock > 594000)
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crtc_state->min_voltage_level = 1;
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else if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock > 594000)
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crtc_state->min_voltage_level = 2;
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