scsi: lpfc: NVME Target: Receive buffer updates
NVME Target: Receive buffer updates Allocates buffer pools and configures adapter interfaces to handle receive buffer (asynchronous FCP CMD ius, first burst data) from the adapter. Splits by protocol, etc. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <james.smart@broadcom.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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committed by
Martin K. Petersen

parent
f358dd0ca2
commit
2d7dbc4c27
@@ -58,6 +58,10 @@
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#define LPFC_MIN_DEVLOSS_TMO 1
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#define LPFC_MAX_DEVLOSS_TMO 255
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#define LPFC_DEF_MRQ_POST 256
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#define LPFC_MIN_MRQ_POST 32
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#define LPFC_MAX_MRQ_POST 512
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/*
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* Write key size should be multiple of 4. If write key is changed
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* make sure that library write key is also changed.
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@@ -3281,6 +3285,24 @@ static DEVICE_ATTR(lpfc_devloss_tmo, S_IRUGO | S_IWUSR,
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LPFC_ATTR_R(suppress_rsp, 1, 0, 1,
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"Enable suppress rsp feature is firmware supports it");
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/*
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* lpfc_nvmet_mrq: Specify number of RQ pairs for processing NVMET cmds
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* lpfc_nvmet_mrq = 1 use a single RQ pair
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* lpfc_nvmet_mrq >= 2 use specified RQ pairs for MRQ
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*
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*/
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LPFC_ATTR_R(nvmet_mrq,
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1, 1, 16,
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"Specify number of RQ pairs for processing NVMET cmds");
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/*
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* lpfc_nvmet_mrq_post: Specify number buffers to post on every MRQ
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*
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*/
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LPFC_ATTR_R(nvmet_mrq_post, LPFC_DEF_MRQ_POST,
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LPFC_MIN_MRQ_POST, LPFC_MAX_MRQ_POST,
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"Specify number of buffers to post on every MRQ");
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/*
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* lpfc_enable_fc4_type: Defines what FC4 types are supported.
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* Supported Values: 1 - register just FCP
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@@ -4657,13 +4679,28 @@ LPFC_VPORT_ATTR_RW(first_burst_size, 0, 0, 65536,
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"First burst size for Targets that support first burst");
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/*
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* lpfc_nvme_enable_fb: Enable NVME first burst on I and T functions.
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* For the Initiator (I), enabling this parameter means that an NVME
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* PRLI response with FBA enabled and an FB_SIZE set to a nonzero value
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* will be processed by the initiator for subsequent NVME FCP IO.
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* lpfc_nvmet_fb_size: NVME Target mode supported first burst size.
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* When the driver is configured as an NVME target, this value is
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* communicated to the NVME initiator in the PRLI response. It is
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* used only when the lpfc_nvme_enable_fb and lpfc_nvmet_support
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* parameters are set and the target is sending the PRLI RSP.
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* Parameter supported on physical port only - no NPIV support.
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* Value range is [0,1]. Default value is 0 (disabled).
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* Value range is [0,65536]. Default value is 0.
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*/
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LPFC_ATTR_RW(nvmet_fb_size, 0, 0, 65536,
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"NVME Target mode first burst size in 512B increments.");
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/*
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* lpfc_nvme_enable_fb: Enable NVME first burst on I and T functions.
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* For the Initiator (I), enabling this parameter means that an NVMET
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* PRLI response with FBA enabled and an FB_SIZE set to a nonzero value will be
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* processed by the initiator for subsequent NVME FCP IO. For the target
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* function (T), enabling this parameter qualifies the lpfc_nvmet_fb_size
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* driver parameter as the target function's first burst size returned to the
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* initiator in the target's NVME PRLI response. Parameter supported on physical
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* port only - no NPIV support.
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* Value range is [0,1]. Default value is 0 (disabled).
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*/
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LPFC_ATTR_RW(nvme_enable_fb, 0, 0, 1,
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"Enable First Burst feature on I and T functions.");
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@@ -5099,7 +5136,10 @@ struct device_attribute *lpfc_hba_attrs[] = {
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&dev_attr_lpfc_fcp_io_channel,
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&dev_attr_lpfc_suppress_rsp,
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&dev_attr_lpfc_nvme_io_channel,
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&dev_attr_lpfc_nvmet_mrq,
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&dev_attr_lpfc_nvmet_mrq_post,
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&dev_attr_lpfc_nvme_enable_fb,
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&dev_attr_lpfc_nvmet_fb_size,
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&dev_attr_lpfc_enable_bg,
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&dev_attr_lpfc_soft_wwnn,
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&dev_attr_lpfc_soft_wwpn,
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@@ -6136,9 +6176,12 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
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lpfc_suppress_rsp_init(phba, lpfc_suppress_rsp);
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lpfc_enable_fc4_type_init(phba, lpfc_enable_fc4_type);
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lpfc_nvmet_mrq_init(phba, lpfc_nvmet_mrq);
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lpfc_nvmet_mrq_post_init(phba, lpfc_nvmet_mrq_post);
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/* Initialize first burst. Target vs Initiator are different. */
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lpfc_nvme_enable_fb_init(phba, lpfc_nvme_enable_fb);
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lpfc_nvmet_fb_size_init(phba, lpfc_nvmet_fb_size);
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lpfc_fcp_io_channel_init(phba, lpfc_fcp_io_channel);
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lpfc_nvme_io_channel_init(phba, lpfc_nvme_io_channel);
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@@ -6205,9 +6248,35 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
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phba->nvmet_support) {
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phba->cfg_enable_fc4_type &= ~LPFC_ENABLE_FCP;
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phba->cfg_fcp_io_channel = 0;
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} else
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lpfc_printf_log(phba, KERN_INFO, LOG_NVME_DISC,
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"6013 %s x%x fb_size x%x, fb_max x%x\n",
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"NVME Target PRLI ACC enable_fb ",
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phba->cfg_nvme_enable_fb,
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phba->cfg_nvmet_fb_size,
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LPFC_NVMET_FB_SZ_MAX);
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if (phba->cfg_nvme_enable_fb == 0)
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phba->cfg_nvmet_fb_size = 0;
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else {
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if (phba->cfg_nvmet_fb_size > LPFC_NVMET_FB_SZ_MAX)
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phba->cfg_nvmet_fb_size = LPFC_NVMET_FB_SZ_MAX;
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}
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/* Adjust lpfc_nvmet_mrq to avoid running out of WQE slots */
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if (phba->cfg_nvmet_mrq > phba->cfg_nvme_io_channel) {
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phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
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lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC,
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"6018 Adjust lpfc_nvmet_mrq to %d\n",
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phba->cfg_nvmet_mrq);
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}
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} else {
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/* Not NVME Target mode. Turn off Target parameters. */
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phba->nvmet_support = 0;
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phba->cfg_nvmet_mrq = 0;
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phba->cfg_nvmet_mrq_post = 0;
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phba->cfg_nvmet_fb_size = 0;
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}
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if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
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phba->io_channel_irqs = phba->cfg_fcp_io_channel;
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