ath9k_hw: Add TempCompensation feature for AR9550
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:

committed by
John W. Linville

parent
3a6a62fbc9
commit
2d7caefbaf
@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
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return 0;
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return 0;
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}
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}
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static int ar9003_hw_power_control_override(struct ath_hw *ah,
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static void ar9003_hw_power_control_override(struct ath_hw *ah,
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int frequency,
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int frequency,
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int *correction,
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int *correction,
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int *voltage, int *temperature)
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int *voltage, int *temperature)
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{
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{
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int tempSlope = 0;
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int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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int f[8], t[8], i;
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int f[8], t[8], t1[3], t2[3], i;
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REG_RMW(ah, AR_PHY_TPC_11_B0,
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REG_RMW(ah, AR_PHY_TPC_11_B0,
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(correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
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(correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
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@@ -4624,14 +4624,41 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
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* enable temperature compensation
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* enable temperature compensation
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* Need to use register names
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* Need to use register names
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*/
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*/
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if (frequency < 4000)
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if (frequency < 4000) {
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tempSlope = eep->modalHeader2G.tempSlope;
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temp_slope = eep->modalHeader2G.tempSlope;
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else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
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} else {
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if (AR_SREV_9550(ah)) {
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t[0] = eep->base_ext1.tempslopextension[2];
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t1[0] = eep->base_ext1.tempslopextension[3];
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t2[0] = eep->base_ext1.tempslopextension[4];
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f[0] = 5180;
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t[1] = eep->modalHeader5G.tempSlope;
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t1[1] = eep->base_ext1.tempslopextension[0];
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t2[1] = eep->base_ext1.tempslopextension[1];
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f[1] = 5500;
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t[2] = eep->base_ext1.tempslopextension[5];
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t1[2] = eep->base_ext1.tempslopextension[6];
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t2[2] = eep->base_ext1.tempslopextension[7];
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f[2] = 5785;
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temp_slope = ar9003_hw_power_interpolate(frequency,
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f, t, 3);
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temp_slope1 = ar9003_hw_power_interpolate(frequency,
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f, t1, 3);
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temp_slope2 = ar9003_hw_power_interpolate(frequency,
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f, t2, 3);
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goto tempslope;
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}
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if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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t[i] = eep->base_ext1.tempslopextension[i];
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t[i] = eep->base_ext1.tempslopextension[i];
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f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
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f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
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}
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}
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tempSlope = ar9003_hw_power_interpolate((s32) frequency,
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temp_slope = ar9003_hw_power_interpolate((s32) frequency,
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f, t, 8);
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f, t, 8);
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} else if (eep->base_ext2.tempSlopeLow != 0) {
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} else if (eep->base_ext2.tempSlopeLow != 0) {
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t[0] = eep->base_ext2.tempSlopeLow;
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t[0] = eep->base_ext2.tempSlopeLow;
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@@ -4640,22 +4667,65 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
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f[1] = 5500;
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f[1] = 5500;
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t[2] = eep->base_ext2.tempSlopeHigh;
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t[2] = eep->base_ext2.tempSlopeHigh;
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f[2] = 5785;
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f[2] = 5785;
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tempSlope = ar9003_hw_power_interpolate((s32) frequency,
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temp_slope = ar9003_hw_power_interpolate((s32) frequency,
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f, t, 3);
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f, t, 3);
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} else
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} else {
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tempSlope = eep->modalHeader5G.tempSlope;
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temp_slope = eep->modalHeader5G.tempSlope;
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}
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}
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REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
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tempslope:
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if (AR_SREV_9550(ah)) {
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/*
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* AR955x has tempSlope register for each chain.
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* Check whether temp_compensation feature is enabled or not.
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*/
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if (eep->baseEepHeader.featureEnable & 0x1) {
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if (frequency < 4000) {
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REG_RMW_FIELD(ah, AR_PHY_TPC_19,
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AR_PHY_TPC_19_ALPHA_THERM,
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eep->base_ext2.tempSlopeLow);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
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AR_PHY_TPC_19_ALPHA_THERM,
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temp_slope);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
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AR_PHY_TPC_19_ALPHA_THERM,
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eep->base_ext2.tempSlopeHigh);
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} else {
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REG_RMW_FIELD(ah, AR_PHY_TPC_19,
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AR_PHY_TPC_19_ALPHA_THERM,
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temp_slope);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
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AR_PHY_TPC_19_ALPHA_THERM,
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temp_slope1);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
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AR_PHY_TPC_19_ALPHA_THERM,
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temp_slope2);
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}
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} else {
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/*
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* If temp compensation is not enabled,
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* set all registers to 0.
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*/
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REG_RMW_FIELD(ah, AR_PHY_TPC_19,
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AR_PHY_TPC_19_ALPHA_THERM, 0);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
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AR_PHY_TPC_19_ALPHA_THERM, 0);
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
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AR_PHY_TPC_19_ALPHA_THERM, 0);
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}
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} else {
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REG_RMW_FIELD(ah, AR_PHY_TPC_19,
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AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
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}
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if (AR_SREV_9462_20(ah))
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if (AR_SREV_9462_20(ah))
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
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REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
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AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
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AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
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REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
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REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
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temperature[0]);
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temperature[0]);
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return 0;
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}
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}
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/* Apply the recorded correction values. */
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/* Apply the recorded correction values. */
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@@ -1028,7 +1028,7 @@
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#define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208)
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#define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208)
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#define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c)
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#define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c)
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#define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
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#define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
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#define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240)
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#define AR_PHY_TPC_19_B2 (AR_SM2_BASE + 0x240)
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#define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
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#define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
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#define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
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#define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
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