ath9k: Use correct PCIE initvals for AR9485
Currently, the PLL is turned off for AR9485 when switching to a low power state, but AR9485 has an issue where the card will become unresponsive if left idle for a long time without any traffic. To fix this, force the PLL to always be on using a different initval array, ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1. This is done for most of the AR9485 based cards like HB125, WB225 etc. but certain models require the feature to be turned off. Identify such cards and use default values for them. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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John W. Linville

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@@ -316,6 +316,7 @@ struct ath9k_ops_config {
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u32 ant_ctrl_comm2g_switch_enable;
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bool xatten_margin_cfg;
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bool alt_mingainidx;
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bool no_pll_pwrsave;
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};
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enum ath9k_int {
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