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drm/i915/psr: Unify VSC setup functions.

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VSC package is decided per eDP spec for psr1 or psr2,
and not per platform, so let's unify it and kill "skl"
func.

v2: Rebased on top of commit d2419ffc10 ("drm/i915: Plumb
    crtc_state to PSR enable/disable")

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-6-rodrigo.vivi@intel.com
This commit is contained in:
Rodrigo Vivi
2017-09-07 16:00:35 -07:00
parent e3702ac9a2
commit 2ce4df87f1
1 changed files with 27 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
drivers/gpu/drm/i915/intel_psr.c
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@@ -117,13 +117,14 @@ static void vlv_psr_setup_vsc(struct intel_dp *intel_dp,
I915_WRITE(VLV_VSCSDP(crtc->pipe), val); I915_WRITE(VLV_VSCSDP(crtc->pipe), val);
} }
static void skl_psr_setup_su_vsc(struct intel_dp *intel_dp, static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state) const struct intel_crtc_state *crtc_state)
{ {
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
struct edp_vsc_psr psr_vsc; struct edp_vsc_psr psr_vsc;
if (dev_priv->psr.psr2_support) {
/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */ /* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
memset(&psr_vsc, 0, sizeof(psr_vsc)); memset(&psr_vsc, 0, sizeof(psr_vsc));
psr_vsc.sdp_header.HB0 = 0; psr_vsc.sdp_header.HB0 = 0;
@@ -139,21 +140,15 @@ static void skl_psr_setup_su_vsc(struct intel_dp *intel_dp,
psr_vsc.sdp_header.HB2 = 0x3; psr_vsc.sdp_header.HB2 = 0x3;
psr_vsc.sdp_header.HB3 = 0xc; psr_vsc.sdp_header.HB3 = 0xc;
} }
} else {
intel_psr_write_vsc(intel_dp, &psr_vsc);
}
static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
struct edp_vsc_psr psr_vsc;
/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */ /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
memset(&psr_vsc, 0, sizeof(psr_vsc)); memset(&psr_vsc, 0, sizeof(psr_vsc));
psr_vsc.sdp_header.HB0 = 0; psr_vsc.sdp_header.HB0 = 0;
psr_vsc.sdp_header.HB1 = 0x7; psr_vsc.sdp_header.HB1 = 0x7;
psr_vsc.sdp_header.HB2 = 0x2; psr_vsc.sdp_header.HB2 = 0x2;
psr_vsc.sdp_header.HB3 = 0x8; psr_vsc.sdp_header.HB3 = 0x8;
}
intel_psr_write_vsc(intel_dp, &psr_vsc); intel_psr_write_vsc(intel_dp, &psr_vsc);
} }
@@ -512,9 +507,10 @@ void intel_psr_enable(struct intel_dp *intel_dp,
dev_priv->psr.busy_frontbuffer_bits = 0; dev_priv->psr.busy_frontbuffer_bits = 0;
if (HAS_DDI(dev_priv)) { if (HAS_DDI(dev_priv)) {
if (dev_priv->psr.psr2_support) {
skl_psr_setup_su_vsc(intel_dp, crtc_state);
hsw_psr_setup_vsc(intel_dp, crtc_state);
if (dev_priv->psr.psr2_support) {
chicken = PSR2_VSC_ENABLE_PROG_HEADER; chicken = PSR2_VSC_ENABLE_PROG_HEADER;
if (dev_priv->psr.y_cord_support) if (dev_priv->psr.y_cord_support)
chicken |= PSR2_ADD_VERTICAL_LINE_COUNT; chicken |= PSR2_ADD_VERTICAL_LINE_COUNT;
@@ -527,9 +523,6 @@ void intel_psr_enable(struct intel_dp *intel_dp,
EDP_PSR_DEBUG_MASK_MAX_SLEEP | EDP_PSR_DEBUG_MASK_MAX_SLEEP |
EDP_PSR_DEBUG_MASK_DISP_REG_WRITE); EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
} else { } else {
/* set up vsc header for psr1 */
hsw_psr_setup_vsc(intel_dp, crtc_state);
/* /*
* Per Spec: Avoid continuous PSR exit by masking MEMUP * Per Spec: Avoid continuous PSR exit by masking MEMUP
* and HPD. also mask LPSP to avoid dependency on other * and HPD. also mask LPSP to avoid dependency on other