Merge branch 'topic/slave_caps_device_control_fix_rebased' into for-linus
This commit is contained in:
@@ -174,6 +174,13 @@
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#define AT_XDMAC_MAX_CHAN 0x20
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#define AT_XDMAC_DMA_BUSWIDTHS\
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(BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) |\
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BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |\
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
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enum atc_status {
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AT_XDMAC_CHAN_IS_CYCLIC = 0,
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AT_XDMAC_CHAN_IS_PAUSED,
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@@ -1107,58 +1114,75 @@ static void at_xdmac_issue_pending(struct dma_chan *chan)
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return;
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}
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static int at_xdmac_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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unsigned long arg)
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static int at_xdmac_device_config(struct dma_chan *chan,
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struct dma_slave_config *config)
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{
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struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
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int ret;
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dev_dbg(chan2dev(chan), "%s\n", __func__);
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spin_lock_bh(&atchan->lock);
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ret = at_xdmac_set_slave_config(chan, config);
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spin_unlock_bh(&atchan->lock);
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return ret;
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}
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static int at_xdmac_device_pause(struct dma_chan *chan)
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{
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struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
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struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
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dev_dbg(chan2dev(chan), "%s\n", __func__);
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spin_lock_bh(&atchan->lock);
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at_xdmac_write(atxdmac, AT_XDMAC_GRWS, atchan->mask);
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set_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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return 0;
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}
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static int at_xdmac_device_resume(struct dma_chan *chan)
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{
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struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
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struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
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dev_dbg(chan2dev(chan), "%s\n", __func__);
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spin_lock_bh(&atchan->lock);
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if (!at_xdmac_chan_is_paused(atchan))
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return 0;
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at_xdmac_write(atxdmac, AT_XDMAC_GRWR, atchan->mask);
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clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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return 0;
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}
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static int at_xdmac_device_terminate_all(struct dma_chan *chan)
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{
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struct at_xdmac_desc *desc, *_desc;
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struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
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struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
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int ret = 0;
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dev_dbg(chan2dev(chan), "%s: cmd=%d\n", __func__, cmd);
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dev_dbg(chan2dev(chan), "%s\n", __func__);
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spin_lock_bh(&atchan->lock);
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at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
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while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
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cpu_relax();
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switch (cmd) {
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case DMA_PAUSE:
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at_xdmac_write(atxdmac, AT_XDMAC_GRWS, atchan->mask);
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set_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
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break;
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case DMA_RESUME:
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if (!at_xdmac_chan_is_paused(atchan))
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break;
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at_xdmac_write(atxdmac, AT_XDMAC_GRWR, atchan->mask);
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clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
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break;
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case DMA_TERMINATE_ALL:
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at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
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while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
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cpu_relax();
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/* Cancel all pending transfers. */
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list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node)
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at_xdmac_remove_xfer(atchan, desc);
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clear_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status);
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break;
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case DMA_SLAVE_CONFIG:
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ret = at_xdmac_set_slave_config(chan,
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(struct dma_slave_config *)arg);
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break;
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default:
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dev_err(chan2dev(chan),
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"unmanaged or unknown dma control cmd: %d\n", cmd);
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ret = -ENXIO;
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}
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/* Cancel all pending transfers. */
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list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node)
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at_xdmac_remove_xfer(atchan, desc);
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clear_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status);
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spin_unlock_bh(&atchan->lock);
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return ret;
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return 0;
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}
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static int at_xdmac_alloc_chan_resources(struct dma_chan *chan)
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@@ -1217,27 +1241,6 @@ static void at_xdmac_free_chan_resources(struct dma_chan *chan)
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return;
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}
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#define AT_XDMAC_DMA_BUSWIDTHS\
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(BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) |\
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BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |\
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
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static int at_xdmac_device_slave_caps(struct dma_chan *dchan,
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struct dma_slave_caps *caps)
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{
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caps->src_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
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caps->dstn_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
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caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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caps->cmd_pause = true;
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caps->cmd_terminate = true;
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caps->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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return 0;
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}
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#ifdef CONFIG_PM
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static int atmel_xdmac_prepare(struct device *dev)
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{
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@@ -1270,7 +1273,7 @@ static int atmel_xdmac_suspend(struct device *dev)
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if (at_xdmac_chan_is_cyclic(atchan)) {
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if (!at_xdmac_chan_is_paused(atchan))
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at_xdmac_control(chan, DMA_PAUSE, 0);
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at_xdmac_device_pause(chan);
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atchan->save_cim = at_xdmac_chan_read(atchan, AT_XDMAC_CIM);
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atchan->save_cnda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA);
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atchan->save_cndc = at_xdmac_chan_read(atchan, AT_XDMAC_CNDC);
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@@ -1407,8 +1410,14 @@ static int at_xdmac_probe(struct platform_device *pdev)
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atxdmac->dma.device_prep_dma_cyclic = at_xdmac_prep_dma_cyclic;
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atxdmac->dma.device_prep_dma_memcpy = at_xdmac_prep_dma_memcpy;
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atxdmac->dma.device_prep_slave_sg = at_xdmac_prep_slave_sg;
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atxdmac->dma.device_control = at_xdmac_control;
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atxdmac->dma.device_slave_caps = at_xdmac_device_slave_caps;
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atxdmac->dma.device_config = at_xdmac_device_config;
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atxdmac->dma.device_pause = at_xdmac_device_pause;
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atxdmac->dma.device_resume = at_xdmac_device_resume;
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atxdmac->dma.device_terminate_all = at_xdmac_device_terminate_all;
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atxdmac->dma.src_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
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atxdmac->dma.dst_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
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atxdmac->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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atxdmac->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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/* Disable all chans and interrupts. */
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at_xdmac_off(atxdmac);
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