[PATCH] ppc32: board-specific part of fs_enet update
This contains board-specific portion to respect driver changes (for 8272ads , 885ads and 866ads). Altered platform_data structures as well as initial setup routines relevant to fs_enet. Changes to the mpc8560ads ppc/ code are also introduced, but mainly as reference, since the entire board support is going to appear in arch/powerpc. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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committed by
Jeff Garzik

parent
5b4b845434
commit
2ca2d5e84c
@@ -16,9 +16,11 @@
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#include <linux/device.h>
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#include <linux/serial_8250.h>
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#include <linux/fsl_devices.h>
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#include <linux/fs_enet_pd.h>
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#include <asm/mpc85xx.h>
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#include <asm/irq.h>
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#include <asm/ppc_sys.h>
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#include <asm/cpm2.h>
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/* We use offsets for IORESOURCE_MEM since we do not know at compile time
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* what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
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@@ -82,6 +84,60 @@ static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = {
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.device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
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};
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static struct fs_platform_info mpc85xx_fcc1_pdata = {
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.fs_no = fsid_fcc1,
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.cp_page = CPM_CR_FCC1_PAGE,
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.cp_block = CPM_CR_FCC1_SBLOCK,
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.rx_ring = 32,
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.tx_ring = 32,
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.rx_copybreak = 240,
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.use_napi = 0,
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.napi_weight = 17,
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.clk_mask = CMX1_CLK_MASK,
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.clk_route = CMX1_CLK_ROUTE,
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.clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
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.mem_offset = FCC1_MEM_OFFSET,
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};
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static struct fs_platform_info mpc85xx_fcc2_pdata = {
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.fs_no = fsid_fcc2,
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.cp_page = CPM_CR_FCC2_PAGE,
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.cp_block = CPM_CR_FCC2_SBLOCK,
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.rx_ring = 32,
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.tx_ring = 32,
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.rx_copybreak = 240,
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.use_napi = 0,
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.napi_weight = 17,
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.clk_mask = CMX2_CLK_MASK,
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.clk_route = CMX2_CLK_ROUTE,
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.clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
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.mem_offset = FCC2_MEM_OFFSET,
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};
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static struct fs_platform_info mpc85xx_fcc3_pdata = {
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.fs_no = fsid_fcc3,
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.cp_page = CPM_CR_FCC3_PAGE,
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.cp_block = CPM_CR_FCC3_SBLOCK,
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.rx_ring = 32,
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.tx_ring = 32,
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.rx_copybreak = 240,
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.use_napi = 0,
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.napi_weight = 17,
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.clk_mask = CMX3_CLK_MASK,
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.clk_route = CMX3_CLK_ROUTE,
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.clk_trx = (PC_F3RXCLK | PC_F3TXCLK),
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.mem_offset = FCC3_MEM_OFFSET,
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};
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static struct plat_serial8250_port serial_platform_data[] = {
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[0] = {
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.mapbase = 0x4500,
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@@ -318,18 +374,27 @@ struct platform_device ppc_sys_platform_devices[] = {
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[MPC85xx_CPM_FCC1] = {
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.name = "fsl-cpm-fcc",
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.id = 1,
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.num_resources = 3,
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.num_resources = 4,
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.dev.platform_data = &mpc85xx_fcc1_pdata,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x91300,
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.end = 0x9131F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_regs_c",
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.start = 0x91380,
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.end = 0x9139F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x88400,
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.end = 0x884ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC1,
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.end = SIU_INT_FCC1,
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@@ -340,18 +405,27 @@ struct platform_device ppc_sys_platform_devices[] = {
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[MPC85xx_CPM_FCC2] = {
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.name = "fsl-cpm-fcc",
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.id = 2,
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.num_resources = 3,
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.num_resources = 4,
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.dev.platform_data = &mpc85xx_fcc2_pdata,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x91320,
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.end = 0x9133F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_regs_c",
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.start = 0x913A0,
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.end = 0x913CF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x88500,
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.end = 0x885ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC2,
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.end = SIU_INT_FCC2,
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@@ -362,18 +436,27 @@ struct platform_device ppc_sys_platform_devices[] = {
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[MPC85xx_CPM_FCC3] = {
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.name = "fsl-cpm-fcc",
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.id = 3,
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.num_resources = 3,
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.num_resources = 4,
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.dev.platform_data = &mpc85xx_fcc3_pdata,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x91340,
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.end = 0x9135F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_regs_c",
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.start = 0x913D0,
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.end = 0x913FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x88600,
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.end = 0x886ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC3,
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.end = SIU_INT_FCC3,
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