drm/radeon: make indirect register access concurrency-safe
With the new per-crtc locking mutliple set-cursor calls could happen in parallel. Out of sheer paranoia I've opted for an irqsave spinlock. But if there's indeed an access from interrupt contexts to these regs it's already broken with the old code, so this can likely just be reduced to a normal spinlock. Otoh the pageflip completion happens from the vblank irq handler ... Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher

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2ef9bdfe64
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2c385151ed
@@ -1556,6 +1556,8 @@ struct radeon_device {
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/* Register mmio */
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resource_size_t rmmio_base;
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resource_size_t rmmio_size;
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/* protects concurrent MM_INDEX/DATA based register access */
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spinlock_t mmio_idx_lock;
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void __iomem *rmmio;
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radeon_rreg_t mc_rreg;
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radeon_wreg_t mc_wreg;
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