wireless: Remove casts to same type
Adding casts of objects to the same type is unnecessary and confusing for a human reader. For example, this cast: int y; int *p = (int *)&y; I used the coccinelle script below to find and remove these unnecessary casts. I manually removed the conversions this script produces of casts with __force, __iomem and __user. @@ type T; T *p; @@ - (T *)p + p Neatened the mwifiex_deauthenticate_infra function which was doing odd things with array pointers and not using is_zero_ether_addr. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:

committed by
David S. Miller

parent
6469933605
commit
2c208890c6
@@ -907,7 +907,7 @@ bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
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struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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__le16 fc = hdr->frame_control;
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u8 *act = (u8 *) (((u8 *) skb->data + MAC80211_3ADDR_LEN));
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u8 *act = (u8 *)skb->data + MAC80211_3ADDR_LEN;
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u8 category;
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if (!ieee80211_is_action(fc))
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@@ -146,7 +146,7 @@ u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
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}
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rtl_cam_program_entry(hw, ul_entry_idx, mac_addr,
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(u8 *) key_content, us_config);
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key_content, us_config);
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RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "<===\n");
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@@ -680,7 +680,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
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mac->short_preamble = bss_conf->use_short_preamble;
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACK_PREAMBLE,
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(u8 *) (&mac->short_preamble));
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&mac->short_preamble);
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}
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if (changed & BSS_CHANGED_ERP_SLOT) {
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@@ -693,7 +693,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
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mac->slot_time = RTL_SLOT_TIME_20;
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
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(u8 *) (&mac->slot_time));
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&mac->slot_time);
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}
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if (changed & BSS_CHANGED_HT) {
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@@ -713,7 +713,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
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rcu_read_unlock();
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SHORTGI_DENSITY,
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(u8 *) (&mac->max_mss_density));
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&mac->max_mss_density);
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_FACTOR,
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&mac->current_ampdu_factor);
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_MIN_SPACE,
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@@ -801,7 +801,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
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u8 mstatus = RT_MEDIA_CONNECT;
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_H2C_FW_JOINBSSRPT,
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(u8 *) (&mstatus));
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&mstatus);
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ppsc->report_linked = true;
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}
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} else {
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@@ -809,7 +809,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
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u8 mstatus = RT_MEDIA_DISCONNECT;
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_H2C_FW_JOINBSSRPT,
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(u8 *)(&mstatus));
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&mstatus);
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ppsc->report_linked = false;
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}
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}
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@@ -836,7 +836,7 @@ static void rtl_op_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
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u8 bibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? 1 : 0;
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mac->tsf = tsf;
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CORRECT_TSF, (u8 *) (&bibss));
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CORRECT_TSF, &bibss);
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}
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static void rtl_op_reset_tsf(struct ieee80211_hw *hw,
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@@ -845,7 +845,7 @@ static void rtl_op_reset_tsf(struct ieee80211_hw *hw,
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u8 tmp = 0;
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_DUAL_TSF_RST, (u8 *) (&tmp));
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_DUAL_TSF_RST, &tmp);
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}
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static void rtl_op_sta_notify(struct ieee80211_hw *hw,
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@@ -352,7 +352,7 @@ void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf)
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_BYTES,
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(u8 *)&efuse_utilized);
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_USAGE,
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(u8 *)&efuse_usage);
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&efuse_usage);
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done:
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for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++)
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kfree(efuse_word[i]);
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@@ -409,7 +409,7 @@ void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
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else if (type == 2)
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efuse_shadow_read_2byte(hw, offset, (u16 *) value);
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else if (type == 4)
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efuse_shadow_read_4byte(hw, offset, (u32 *) value);
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efuse_shadow_read_4byte(hw, offset, value);
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}
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@@ -756,10 +756,10 @@ done:
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if (index == rtlpci->rxringcount - 1)
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rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
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HW_DESC_RXERO,
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(u8 *)&tmp_one);
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&tmp_one);
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rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
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(u8 *)&tmp_one);
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&tmp_one);
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index = (index + 1) % rtlpci->rxringcount;
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}
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@@ -934,7 +934,7 @@ static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
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__skb_queue_tail(&ring->queue, pskb);
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rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
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(u8 *)&temp_one);
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&temp_one);
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return;
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}
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@@ -1126,11 +1126,11 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
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rxbuffersize);
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rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
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HW_DESC_RXOWN,
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(u8 *)&tmp_one);
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&tmp_one);
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}
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rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
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HW_DESC_RXERO, (u8 *)&tmp_one);
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HW_DESC_RXERO, &tmp_one);
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}
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return 0;
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}
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@@ -1263,7 +1263,7 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
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rtlpriv->cfg->ops->set_desc((u8 *) entry,
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false,
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HW_DESC_RXOWN,
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(u8 *)&tmp_one);
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&tmp_one);
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}
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rtlpci->rx_ring[rx_queue_idx].idx = 0;
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}
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@@ -1422,7 +1422,7 @@ static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
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__skb_queue_tail(&ring->queue, skb);
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rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
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HW_DESC_OWN, (u8 *)&temp_one);
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HW_DESC_OWN, &temp_one);
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if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
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@@ -333,10 +333,10 @@ static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
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rpwm_val = 0x0C; /* RF on */
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fw_pwrmode = FW_PS_ACTIVE_MODE;
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM,
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(u8 *) (&rpwm_val));
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&rpwm_val);
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_H2C_FW_PWRMODE,
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(u8 *) (&fw_pwrmode));
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&fw_pwrmode);
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fw_current_inps = false;
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rtlpriv->cfg->ops->set_hw_reg(hw,
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@@ -356,11 +356,11 @@ static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
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(u8 *) (&fw_current_inps));
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_H2C_FW_PWRMODE,
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(u8 *) (&ppsc->fwctrl_psmode));
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&ppsc->fwctrl_psmode);
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_SET_RPWM,
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(u8 *) (&rpwm_val));
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&rpwm_val);
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} else {
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/* Reset the power save related parameters. */
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ppsc->dot11_psmode = EACTIVE;
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@@ -446,7 +446,7 @@ void rtl_swlps_beacon(struct ieee80211_hw *hw, void *data, unsigned int len)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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struct ieee80211_hdr *hdr = (void *) data;
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struct ieee80211_hdr *hdr = data;
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struct ieee80211_tim_ie *tim_ie;
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u8 *tim;
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u8 tim_len;
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@@ -656,9 +656,8 @@ static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
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} else {
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if (rtlpriv->dm.current_turbo_edca) {
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u8 tmp = AC0_BE;
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_AC_PARAM,
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(u8 *) (&tmp));
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rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
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&tmp);
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rtlpriv->dm.current_turbo_edca = false;
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}
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}
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@@ -168,7 +168,7 @@ static void _rtl92c_write_fw(struct ieee80211_hw *hw,
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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u8 *bufferPtr = (u8 *) buffer;
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u8 *bufferPtr = buffer;
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RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, "FW size is %d bytes\n", size);
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@@ -262,7 +262,7 @@ int rtl92c_download_fw(struct ieee80211_hw *hw)
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return 1;
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pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
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pfwdata = (u8 *) rtlhal->pfirmware;
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pfwdata = rtlhal->pfirmware;
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fwsize = rtlhal->fwsize;
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if (IS_FW_HEADER_EXIST(pfwheader)) {
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@@ -214,13 +214,13 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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for (e_aci = 0; e_aci < AC_MAX; e_aci++) {
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_AC_PARAM,
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(u8 *) (&e_aci));
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&e_aci);
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}
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break;
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}
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case HW_VAR_ACK_PREAMBLE:{
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u8 reg_tmp;
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u8 short_preamble = (bool) (*(u8 *) val);
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u8 short_preamble = (bool)*val;
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reg_tmp = (mac->cur_40_prime_sc) << 5;
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if (short_preamble)
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reg_tmp |= 0x80;
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@@ -232,7 +232,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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u8 min_spacing_to_set;
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u8 sec_min_space;
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min_spacing_to_set = *((u8 *) val);
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min_spacing_to_set = *val;
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if (min_spacing_to_set <= 7) {
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sec_min_space = 0;
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@@ -257,7 +257,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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case HW_VAR_SHORTGI_DENSITY:{
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u8 density_to_set;
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density_to_set = *((u8 *) val);
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density_to_set = *val;
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mac->min_space_cfg |= (density_to_set << 3);
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RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
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@@ -284,7 +284,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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else
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p_regtoset = regtoset_normal;
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factor_toset = *((u8 *) val);
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factor_toset = *(val);
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if (factor_toset <= 3) {
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factor_toset = (1 << (factor_toset + 2));
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if (factor_toset > 0xf)
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@@ -316,17 +316,17 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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break;
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}
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case HW_VAR_AC_PARAM:{
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u8 e_aci = *((u8 *) val);
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u8 e_aci = *(val);
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rtl92c_dm_init_edca_turbo(hw);
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if (rtlpci->acm_method != eAcmWay2_SW)
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rtlpriv->cfg->ops->set_hw_reg(hw,
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HW_VAR_ACM_CTRL,
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(u8 *) (&e_aci));
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(&e_aci));
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break;
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}
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case HW_VAR_ACM_CTRL:{
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u8 e_aci = *((u8 *) val);
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u8 e_aci = *(val);
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union aci_aifsn *p_aci_aifsn =
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(union aci_aifsn *)(&(mac->ac[0].aifs));
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u8 acm = p_aci_aifsn->f.acm;
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@@ -382,7 +382,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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break;
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}
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case HW_VAR_RETRY_LIMIT:{
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u8 retry_limit = ((u8 *) (val))[0];
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u8 retry_limit = val[0];
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rtl_write_word(rtlpriv, REG_RL,
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retry_limit << RETRY_LIMIT_SHORT_SHIFT |
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@@ -396,13 +396,13 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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rtlefuse->efuse_usedbytes = *((u16 *) val);
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break;
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case HW_VAR_EFUSE_USAGE:
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rtlefuse->efuse_usedpercentage = *((u8 *) val);
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rtlefuse->efuse_usedpercentage = *val;
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break;
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case HW_VAR_IO_CMD:
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rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val));
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break;
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case HW_VAR_WPA_CONFIG:
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rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
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rtl_write_byte(rtlpriv, REG_SECCFG, *val);
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break;
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case HW_VAR_SET_RPWM:{
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u8 rpwm_val;
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@@ -411,31 +411,30 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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udelay(1);
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if (rpwm_val & BIT(7)) {
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rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
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(*(u8 *) val));
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rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val);
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} else {
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rtl_write_byte(rtlpriv, REG_PCIE_HRPWM,
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((*(u8 *) val) | BIT(7)));
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*val | BIT(7));
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}
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break;
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}
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case HW_VAR_H2C_FW_PWRMODE:{
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u8 psmode = (*(u8 *) val);
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u8 psmode = *val;
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if ((psmode != FW_PS_ACTIVE_MODE) &&
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(!IS_92C_SERIAL(rtlhal->version))) {
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rtl92c_dm_rf_saving(hw, true);
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}
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rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val));
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rtl92c_set_fw_pwrmode_cmd(hw, *val);
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break;
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}
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case HW_VAR_FW_PSMODE_STATUS:
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ppsc->fw_current_inpsmode = *((bool *) val);
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break;
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case HW_VAR_H2C_FW_JOINBSSRPT:{
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u8 mstatus = (*(u8 *) val);
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u8 mstatus = *val;
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u8 tmp_regcr, tmp_reg422;
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bool recover = false;
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@@ -472,7 +471,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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rtl_write_byte(rtlpriv, REG_CR + 1,
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(tmp_regcr & ~(BIT(0))));
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}
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rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
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rtl92c_set_fw_joinbss_report_cmd(hw, *val);
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break;
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}
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@@ -486,7 +485,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
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break;
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}
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case HW_VAR_CORRECT_TSF:{
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u8 btype_ibss = ((u8 *) (val))[0];
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u8 btype_ibss = val[0];
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if (btype_ibss)
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_rtl92ce_stop_tx_beacon(hw);
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@@ -1589,10 +1588,10 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw)
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rtlefuse->autoload_failflag,
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hwinfo);
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rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
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rtlefuse->eeprom_channelplan = *&hwinfo[EEPROM_CHANNELPLAN];
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rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
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rtlefuse->txpwr_fromeprom = true;
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rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
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rtlefuse->eeprom_oemid = *&hwinfo[EEPROM_CUSTOMER_ID];
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RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
|
||||
"EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid);
|
||||
@@ -1939,7 +1938,7 @@ void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw)
|
||||
u16 sifs_timer;
|
||||
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
|
||||
(u8 *)&mac->slot_time);
|
||||
&mac->slot_time);
|
||||
if (!mac->ht_enable)
|
||||
sifs_timer = 0x0a0a;
|
||||
else
|
||||
|
@@ -605,7 +605,7 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
|
||||
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
|
||||
bool defaultadapter = true;
|
||||
struct ieee80211_sta *sta;
|
||||
u8 *pdesc = (u8 *) pdesc_tx;
|
||||
u8 *pdesc = pdesc_tx;
|
||||
u16 seq_number;
|
||||
__le16 fc = hdr->frame_control;
|
||||
u8 fw_qsel = _rtl92ce_map_hwqueue_to_fwqueue(skb, hw_queue);
|
||||
@@ -806,7 +806,7 @@ void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
|
||||
|
||||
SET_TX_DESC_OWN(pdesc, 1);
|
||||
|
||||
SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
|
||||
SET_TX_DESC_PKT_SIZE(pdesc, (u16) (skb->len));
|
||||
|
||||
SET_TX_DESC_FIRST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_LAST_SEG(pdesc, 1);
|
||||
|
@@ -381,11 +381,11 @@ static void _rtl92cu_read_adapter_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->eeprom_did = le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_DID]);
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, " VID = 0x%02x PID = 0x%02x\n",
|
||||
rtlefuse->eeprom_vid, rtlefuse->eeprom_did);
|
||||
rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
|
||||
rtlefuse->eeprom_channelplan = hwinfo[EEPROM_CHANNELPLAN];
|
||||
rtlefuse->eeprom_version =
|
||||
le16_to_cpu(*(__le16 *)&hwinfo[EEPROM_VERSION]);
|
||||
rtlefuse->txpwr_fromeprom = true;
|
||||
rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
|
||||
rtlefuse->eeprom_oemid = hwinfo[EEPROM_CUSTOMER_ID];
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n",
|
||||
rtlefuse->eeprom_oemid);
|
||||
if (rtlhal->oem_id == RT_CID_DEFAULT) {
|
||||
@@ -1660,7 +1660,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
for (e_aci = 0; e_aci < AC_MAX; e_aci++)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
HW_VAR_AC_PARAM,
|
||||
(u8 *)(&e_aci));
|
||||
&e_aci);
|
||||
} else {
|
||||
u8 sifstime = 0;
|
||||
u8 u1bAIFS;
|
||||
@@ -1685,7 +1685,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
}
|
||||
case HW_VAR_ACK_PREAMBLE:{
|
||||
u8 reg_tmp;
|
||||
u8 short_preamble = (bool) (*(u8 *) val);
|
||||
u8 short_preamble = (bool)*val;
|
||||
reg_tmp = 0;
|
||||
if (short_preamble)
|
||||
reg_tmp |= 0x80;
|
||||
@@ -1696,7 +1696,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
u8 min_spacing_to_set;
|
||||
u8 sec_min_space;
|
||||
|
||||
min_spacing_to_set = *((u8 *) val);
|
||||
min_spacing_to_set = *val;
|
||||
if (min_spacing_to_set <= 7) {
|
||||
switch (rtlpriv->sec.pairwise_enc_algorithm) {
|
||||
case NO_ENCRYPTION:
|
||||
@@ -1729,7 +1729,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HW_VAR_SHORTGI_DENSITY:{
|
||||
u8 density_to_set;
|
||||
|
||||
density_to_set = *((u8 *) val);
|
||||
density_to_set = *val;
|
||||
density_to_set &= 0x1f;
|
||||
mac->min_space_cfg &= 0x07;
|
||||
mac->min_space_cfg |= (density_to_set << 3);
|
||||
@@ -1747,7 +1747,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
u8 index = 0;
|
||||
|
||||
p_regtoset = regtoset_normal;
|
||||
factor_toset = *((u8 *) val);
|
||||
factor_toset = *val;
|
||||
if (factor_toset <= 3) {
|
||||
factor_toset = (1 << (factor_toset + 2));
|
||||
if (factor_toset > 0xf)
|
||||
@@ -1774,7 +1774,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_AC_PARAM:{
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
u32 u4b_ac_param;
|
||||
u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min);
|
||||
u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max);
|
||||
@@ -1814,11 +1814,11 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
}
|
||||
if (rtlusb->acm_method != eAcmWay2_SW)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
HW_VAR_ACM_CTRL, (u8 *)(&e_aci));
|
||||
HW_VAR_ACM_CTRL, &e_aci);
|
||||
break;
|
||||
}
|
||||
case HW_VAR_ACM_CTRL:{
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)
|
||||
(&(mac->ac[0].aifs));
|
||||
u8 acm = p_aci_aifsn->f.acm;
|
||||
@@ -1874,7 +1874,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_RETRY_LIMIT:{
|
||||
u8 retry_limit = ((u8 *) (val))[0];
|
||||
u8 retry_limit = val[0];
|
||||
|
||||
rtl_write_word(rtlpriv, REG_RL,
|
||||
retry_limit << RETRY_LIMIT_SHORT_SHIFT |
|
||||
@@ -1891,39 +1891,38 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
rtlefuse->efuse_usedbytes = *((u16 *) val);
|
||||
break;
|
||||
case HW_VAR_EFUSE_USAGE:
|
||||
rtlefuse->efuse_usedpercentage = *((u8 *) val);
|
||||
rtlefuse->efuse_usedpercentage = *val;
|
||||
break;
|
||||
case HW_VAR_IO_CMD:
|
||||
rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val));
|
||||
break;
|
||||
case HW_VAR_WPA_CONFIG:
|
||||
rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
|
||||
rtl_write_byte(rtlpriv, REG_SECCFG, *val);
|
||||
break;
|
||||
case HW_VAR_SET_RPWM:{
|
||||
u8 rpwm_val = rtl_read_byte(rtlpriv, REG_USB_HRPWM);
|
||||
|
||||
if (rpwm_val & BIT(7))
|
||||
rtl_write_byte(rtlpriv, REG_USB_HRPWM,
|
||||
(*(u8 *)val));
|
||||
rtl_write_byte(rtlpriv, REG_USB_HRPWM, *val);
|
||||
else
|
||||
rtl_write_byte(rtlpriv, REG_USB_HRPWM,
|
||||
((*(u8 *)val) | BIT(7)));
|
||||
*val | BIT(7));
|
||||
break;
|
||||
}
|
||||
case HW_VAR_H2C_FW_PWRMODE:{
|
||||
u8 psmode = (*(u8 *) val);
|
||||
u8 psmode = *val;
|
||||
|
||||
if ((psmode != FW_PS_ACTIVE_MODE) &&
|
||||
(!IS_92C_SERIAL(rtlhal->version)))
|
||||
rtl92c_dm_rf_saving(hw, true);
|
||||
rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val));
|
||||
rtl92c_set_fw_pwrmode_cmd(hw, (*val));
|
||||
break;
|
||||
}
|
||||
case HW_VAR_FW_PSMODE_STATUS:
|
||||
ppsc->fw_current_inpsmode = *((bool *) val);
|
||||
break;
|
||||
case HW_VAR_H2C_FW_JOINBSSRPT:{
|
||||
u8 mstatus = (*(u8 *) val);
|
||||
u8 mstatus = *val;
|
||||
u8 tmp_reg422;
|
||||
bool recover = false;
|
||||
|
||||
@@ -1948,7 +1947,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
tmp_reg422 | BIT(6));
|
||||
rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
|
||||
}
|
||||
rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
|
||||
rtl92c_set_fw_joinbss_report_cmd(hw, (*val));
|
||||
break;
|
||||
}
|
||||
case HW_VAR_AID:{
|
||||
@@ -1961,7 +1960,7 @@ void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_CORRECT_TSF:{
|
||||
u8 btype_ibss = ((u8 *) (val))[0];
|
||||
u8 btype_ibss = val[0];
|
||||
|
||||
if (btype_ibss)
|
||||
_rtl92cu_stop_tx_beacon(hw);
|
||||
@@ -2184,7 +2183,7 @@ void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw)
|
||||
u16 sifs_timer;
|
||||
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
|
||||
(u8 *)&mac->slot_time);
|
||||
&mac->slot_time);
|
||||
if (!mac->ht_enable)
|
||||
sifs_timer = 0x0a0a;
|
||||
else
|
||||
|
@@ -668,7 +668,7 @@ void rtl92cu_tx_fill_cmddesc(struct ieee80211_hw *hw,
|
||||
SET_TX_DESC_RATE_ID(pdesc, 7);
|
||||
SET_TX_DESC_MACID(pdesc, 0);
|
||||
SET_TX_DESC_OWN(pdesc, 1);
|
||||
SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
|
||||
SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb->len);
|
||||
SET_TX_DESC_FIRST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_LAST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_OFFSET(pdesc, 0x20);
|
||||
|
@@ -696,7 +696,7 @@ static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
|
||||
if (rtlpriv->dm.current_turbo_edca) {
|
||||
u8 tmp = AC0_BE;
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
|
||||
(u8 *) (&tmp));
|
||||
&tmp);
|
||||
rtlpriv->dm.current_turbo_edca = false;
|
||||
}
|
||||
}
|
||||
|
@@ -120,7 +120,7 @@ static void _rtl92d_write_fw(struct ieee80211_hw *hw,
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
|
||||
u8 *bufferPtr = (u8 *) buffer;
|
||||
u8 *bufferPtr = buffer;
|
||||
u32 pagenums, remainSize;
|
||||
u32 page, offset;
|
||||
|
||||
@@ -256,8 +256,8 @@ int rtl92d_download_fw(struct ieee80211_hw *hw)
|
||||
if (rtlpriv->max_fw_size == 0 || !rtlhal->pfirmware)
|
||||
return 1;
|
||||
fwsize = rtlhal->fwsize;
|
||||
pfwheader = (u8 *) rtlhal->pfirmware;
|
||||
pfwdata = (u8 *) rtlhal->pfirmware;
|
||||
pfwheader = rtlhal->pfirmware;
|
||||
pfwdata = rtlhal->pfirmware;
|
||||
rtlhal->fw_version = (u16) GET_FIRMWARE_HDR_VERSION(pfwheader);
|
||||
rtlhal->fw_subversion = (u16) GET_FIRMWARE_HDR_SUB_VER(pfwheader);
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
|
||||
|
@@ -235,12 +235,12 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
for (e_aci = 0; e_aci < AC_MAX; e_aci++)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
HW_VAR_AC_PARAM,
|
||||
(u8 *) (&e_aci));
|
||||
(&e_aci));
|
||||
break;
|
||||
}
|
||||
case HW_VAR_ACK_PREAMBLE: {
|
||||
u8 reg_tmp;
|
||||
u8 short_preamble = (bool) (*(u8 *) val);
|
||||
u8 short_preamble = (bool) (*val);
|
||||
|
||||
reg_tmp = (mac->cur_40_prime_sc) << 5;
|
||||
if (short_preamble)
|
||||
@@ -252,7 +252,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
u8 min_spacing_to_set;
|
||||
u8 sec_min_space;
|
||||
|
||||
min_spacing_to_set = *((u8 *) val);
|
||||
min_spacing_to_set = *val;
|
||||
if (min_spacing_to_set <= 7) {
|
||||
sec_min_space = 0;
|
||||
if (min_spacing_to_set < sec_min_space)
|
||||
@@ -271,7 +271,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HW_VAR_SHORTGI_DENSITY: {
|
||||
u8 density_to_set;
|
||||
|
||||
density_to_set = *((u8 *) val);
|
||||
density_to_set = *val;
|
||||
mac->min_space_cfg = rtlpriv->rtlhal.minspace_cfg;
|
||||
mac->min_space_cfg |= (density_to_set << 3);
|
||||
RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
|
||||
@@ -293,7 +293,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
regtoSet = 0x66626641;
|
||||
else
|
||||
regtoSet = 0xb972a841;
|
||||
factor_toset = *((u8 *) val);
|
||||
factor_toset = *val;
|
||||
if (factor_toset <= 3) {
|
||||
factor_toset = (1 << (factor_toset + 2));
|
||||
if (factor_toset > 0xf)
|
||||
@@ -316,15 +316,15 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_AC_PARAM: {
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
rtl92d_dm_init_edca_turbo(hw);
|
||||
if (rtlpci->acm_method != eAcmWay2_SW)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL,
|
||||
(u8 *) (&e_aci));
|
||||
&e_aci);
|
||||
break;
|
||||
}
|
||||
case HW_VAR_ACM_CTRL: {
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
union aci_aifsn *p_aci_aifsn =
|
||||
(union aci_aifsn *)(&(mac->ac[0].aifs));
|
||||
u8 acm = p_aci_aifsn->f.acm;
|
||||
@@ -376,7 +376,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
rtlpci->receive_config = ((u32 *) (val))[0];
|
||||
break;
|
||||
case HW_VAR_RETRY_LIMIT: {
|
||||
u8 retry_limit = ((u8 *) (val))[0];
|
||||
u8 retry_limit = val[0];
|
||||
|
||||
rtl_write_word(rtlpriv, REG_RL,
|
||||
retry_limit << RETRY_LIMIT_SHORT_SHIFT |
|
||||
@@ -390,16 +390,16 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
rtlefuse->efuse_usedbytes = *((u16 *) val);
|
||||
break;
|
||||
case HW_VAR_EFUSE_USAGE:
|
||||
rtlefuse->efuse_usedpercentage = *((u8 *) val);
|
||||
rtlefuse->efuse_usedpercentage = *val;
|
||||
break;
|
||||
case HW_VAR_IO_CMD:
|
||||
rtl92d_phy_set_io_cmd(hw, (*(enum io_type *)val));
|
||||
break;
|
||||
case HW_VAR_WPA_CONFIG:
|
||||
rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
|
||||
rtl_write_byte(rtlpriv, REG_SECCFG, *val);
|
||||
break;
|
||||
case HW_VAR_SET_RPWM:
|
||||
rtl92d_fill_h2c_cmd(hw, H2C_PWRM, 1, (u8 *) (val));
|
||||
rtl92d_fill_h2c_cmd(hw, H2C_PWRM, 1, (val));
|
||||
break;
|
||||
case HW_VAR_H2C_FW_PWRMODE:
|
||||
break;
|
||||
@@ -407,7 +407,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
ppsc->fw_current_inpsmode = *((bool *) val);
|
||||
break;
|
||||
case HW_VAR_H2C_FW_JOINBSSRPT: {
|
||||
u8 mstatus = (*(u8 *) val);
|
||||
u8 mstatus = (*val);
|
||||
u8 tmp_regcr, tmp_reg422;
|
||||
bool recover = false;
|
||||
|
||||
@@ -435,7 +435,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
rtl_write_byte(rtlpriv, REG_CR + 1,
|
||||
(tmp_regcr & ~(BIT(0))));
|
||||
}
|
||||
rtl92d_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
|
||||
rtl92d_set_fw_joinbss_report_cmd(hw, (*val));
|
||||
break;
|
||||
}
|
||||
case HW_VAR_AID: {
|
||||
@@ -447,7 +447,7 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_CORRECT_TSF: {
|
||||
u8 btype_ibss = ((u8 *) (val))[0];
|
||||
u8 btype_ibss = val[0];
|
||||
|
||||
if (btype_ibss)
|
||||
_rtl92de_stop_tx_beacon(hw);
|
||||
@@ -1794,7 +1794,7 @@ static void _rtl92de_read_adapter_info(struct ieee80211_hw *hw)
|
||||
"RTL819X Not boot from eeprom, check it !!\n");
|
||||
return;
|
||||
}
|
||||
rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
|
||||
rtlefuse->eeprom_oemid = hwinfo[EEPROM_CUSTOMER_ID];
|
||||
_rtl92de_read_macphymode_and_bandtype(hw, hwinfo);
|
||||
|
||||
/* VID, DID SE 0xA-D */
|
||||
@@ -2115,7 +2115,7 @@ void rtl92de_update_channel_access_setting(struct ieee80211_hw *hw)
|
||||
u16 sifs_timer;
|
||||
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
|
||||
(u8 *)&mac->slot_time);
|
||||
&mac->slot_time);
|
||||
if (!mac->ht_enable)
|
||||
sifs_timer = 0x0a0a;
|
||||
else
|
||||
|
@@ -560,7 +560,7 @@ void rtl92de_tx_fill_desc(struct ieee80211_hw *hw,
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
|
||||
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
|
||||
struct ieee80211_sta *sta = info->control.sta;
|
||||
u8 *pdesc = (u8 *) pdesc_tx;
|
||||
u8 *pdesc = pdesc_tx;
|
||||
u16 seq_number;
|
||||
__le16 fc = hdr->frame_control;
|
||||
unsigned int buf_len = 0;
|
||||
@@ -761,11 +761,11 @@ void rtl92de_tx_fill_cmddesc(struct ieee80211_hw *hw,
|
||||
SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
|
||||
SET_TX_DESC_FIRST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_LAST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
|
||||
SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)skb->len);
|
||||
SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
|
||||
SET_TX_DESC_RATE_ID(pdesc, 7);
|
||||
SET_TX_DESC_MACID(pdesc, 0);
|
||||
SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
|
||||
SET_TX_DESC_PKT_SIZE(pdesc, (u16) (skb->len));
|
||||
SET_TX_DESC_FIRST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_LAST_SEG(pdesc, 1);
|
||||
SET_TX_DESC_OFFSET(pdesc, 0x20);
|
||||
|
@@ -146,7 +146,7 @@ static void _rtl92s_dm_check_edca_turbo(struct ieee80211_hw *hw)
|
||||
if (rtlpriv->dm.current_turbo_edca) {
|
||||
u8 tmp = AC0_BE;
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
|
||||
(u8 *)(&tmp));
|
||||
&tmp);
|
||||
rtlpriv->dm.current_turbo_edca = false;
|
||||
}
|
||||
}
|
||||
|
@@ -145,13 +145,13 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
for (e_aci = 0; e_aci < AC_MAX; e_aci++) {
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
HW_VAR_AC_PARAM,
|
||||
(u8 *)(&e_aci));
|
||||
(&e_aci));
|
||||
}
|
||||
break;
|
||||
}
|
||||
case HW_VAR_ACK_PREAMBLE:{
|
||||
u8 reg_tmp;
|
||||
u8 short_preamble = (bool) (*(u8 *) val);
|
||||
u8 short_preamble = (bool) (*val);
|
||||
reg_tmp = (mac->cur_40_prime_sc) << 5;
|
||||
if (short_preamble)
|
||||
reg_tmp |= 0x80;
|
||||
@@ -163,7 +163,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
u8 min_spacing_to_set;
|
||||
u8 sec_min_space;
|
||||
|
||||
min_spacing_to_set = *((u8 *)val);
|
||||
min_spacing_to_set = *val;
|
||||
if (min_spacing_to_set <= 7) {
|
||||
if (rtlpriv->sec.pairwise_enc_algorithm ==
|
||||
NO_ENCRYPTION)
|
||||
@@ -194,7 +194,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
case HW_VAR_SHORTGI_DENSITY:{
|
||||
u8 density_to_set;
|
||||
|
||||
density_to_set = *((u8 *) val);
|
||||
density_to_set = *val;
|
||||
mac->min_space_cfg = rtlpriv->rtlhal.minspace_cfg;
|
||||
mac->min_space_cfg |= (density_to_set << 3);
|
||||
|
||||
@@ -216,7 +216,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
15, 15, 15, 15, 0};
|
||||
u8 index = 0;
|
||||
|
||||
factor_toset = *((u8 *) val);
|
||||
factor_toset = *val;
|
||||
if (factor_toset <= 3) {
|
||||
factor_toset = (1 << (factor_toset + 2));
|
||||
if (factor_toset > 0xf)
|
||||
@@ -248,17 +248,17 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_AC_PARAM:{
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
rtl92s_dm_init_edca_turbo(hw);
|
||||
|
||||
if (rtlpci->acm_method != eAcmWay2_SW)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
HW_VAR_ACM_CTRL,
|
||||
(u8 *)(&e_aci));
|
||||
&e_aci);
|
||||
break;
|
||||
}
|
||||
case HW_VAR_ACM_CTRL:{
|
||||
u8 e_aci = *((u8 *) val);
|
||||
u8 e_aci = *val;
|
||||
union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)(&(
|
||||
mac->ac[0].aifs));
|
||||
u8 acm = p_aci_aifsn->f.acm;
|
||||
@@ -313,7 +313,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_RETRY_LIMIT:{
|
||||
u8 retry_limit = ((u8 *) (val))[0];
|
||||
u8 retry_limit = val[0];
|
||||
|
||||
rtl_write_word(rtlpriv, RETRY_LIMIT,
|
||||
retry_limit << RETRY_LIMIT_SHORT_SHIFT |
|
||||
@@ -328,14 +328,14 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
|
||||
break;
|
||||
}
|
||||
case HW_VAR_EFUSE_USAGE: {
|
||||
rtlefuse->efuse_usedpercentage = *((u8 *) val);
|
||||
rtlefuse->efuse_usedpercentage = *val;
|
||||
break;
|
||||
}
|
||||
case HW_VAR_IO_CMD: {
|
||||
break;
|
||||
}
|
||||
case HW_VAR_WPA_CONFIG: {
|
||||
rtl_write_byte(rtlpriv, REG_SECR, *((u8 *) val));
|
||||
rtl_write_byte(rtlpriv, REG_SECR, *val);
|
||||
break;
|
||||
}
|
||||
case HW_VAR_SET_RPWM:{
|
||||
@@ -1813,8 +1813,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
else
|
||||
index = 2;
|
||||
|
||||
tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF +
|
||||
index]) & 0xff;
|
||||
tempval = hwinfo[EEPROM_TX_PWR_HT20_DIFF + index] & 0xff;
|
||||
rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF);
|
||||
rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] =
|
||||
((tempval >> 4) & 0xF);
|
||||
@@ -1830,14 +1829,13 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
else
|
||||
index = 1;
|
||||
|
||||
tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF + index])
|
||||
& 0xff;
|
||||
tempval = hwinfo[EEPROM_TX_PWR_OFDM_DIFF + index] & 0xff;
|
||||
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] =
|
||||
(tempval & 0xF);
|
||||
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i] =
|
||||
((tempval >> 4) & 0xF);
|
||||
|
||||
tempval = (*(u8 *)&hwinfo[TX_PWR_SAFETY_CHK]);
|
||||
tempval = hwinfo[TX_PWR_SAFETY_CHK];
|
||||
rtlefuse->txpwr_safetyflag = (tempval & 0x01);
|
||||
}
|
||||
|
||||
@@ -1876,7 +1874,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
|
||||
/* Read RF-indication and Tx Power gain
|
||||
* index diff of legacy to HT OFDM rate. */
|
||||
tempval = (*(u8 *)&hwinfo[EEPROM_RFIND_POWERDIFF]) & 0xff;
|
||||
tempval = hwinfo[EEPROM_RFIND_POWERDIFF] & 0xff;
|
||||
rtlefuse->eeprom_txpowerdiff = tempval;
|
||||
rtlefuse->legacy_httxpowerdiff =
|
||||
rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][0];
|
||||
@@ -1887,7 +1885,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
/* Get TSSI value for each path. */
|
||||
usvalue = *(u16 *)&hwinfo[EEPROM_TSSI_A];
|
||||
rtlefuse->eeprom_tssi[RF90_PATH_A] = (u8)((usvalue & 0xff00) >> 8);
|
||||
usvalue = *(u8 *)&hwinfo[EEPROM_TSSI_B];
|
||||
usvalue = hwinfo[EEPROM_TSSI_B];
|
||||
rtlefuse->eeprom_tssi[RF90_PATH_B] = (u8)(usvalue & 0xff);
|
||||
|
||||
RTPRINT(rtlpriv, FINIT, INIT_TxPower, "TSSI_A = 0x%x, TSSI_B = 0x%x\n",
|
||||
@@ -1896,7 +1894,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
|
||||
/* Read antenna tx power offset of B/C/D to A from EEPROM */
|
||||
/* and read ThermalMeter from EEPROM */
|
||||
tempval = *(u8 *)&hwinfo[EEPROM_THERMALMETER];
|
||||
tempval = hwinfo[EEPROM_THERMALMETER];
|
||||
rtlefuse->eeprom_thermalmeter = tempval;
|
||||
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
|
||||
"thermalmeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
|
||||
@@ -1906,20 +1904,20 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
rtlefuse->tssi_13dbm = rtlefuse->eeprom_thermalmeter * 100;
|
||||
|
||||
/* Read CrystalCap from EEPROM */
|
||||
tempval = (*(u8 *)&hwinfo[EEPROM_CRYSTALCAP]) >> 4;
|
||||
tempval = hwinfo[EEPROM_CRYSTALCAP] >> 4;
|
||||
rtlefuse->eeprom_crystalcap = tempval;
|
||||
/* CrystalCap, BIT(12)~15 */
|
||||
rtlefuse->crystalcap = rtlefuse->eeprom_crystalcap;
|
||||
|
||||
/* Read IC Version && Channel Plan */
|
||||
/* Version ID, Channel plan */
|
||||
rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
|
||||
rtlefuse->eeprom_channelplan = hwinfo[EEPROM_CHANNELPLAN];
|
||||
rtlefuse->txpwr_fromeprom = true;
|
||||
RTPRINT(rtlpriv, FINIT, INIT_TxPower,
|
||||
"EEPROM ChannelPlan = 0x%4x\n", rtlefuse->eeprom_channelplan);
|
||||
|
||||
/* Read Customer ID or Board Type!!! */
|
||||
tempval = *(u8 *)&hwinfo[EEPROM_BOARDTYPE];
|
||||
tempval = hwinfo[EEPROM_BOARDTYPE];
|
||||
/* Change RF type definition */
|
||||
if (tempval == 0)
|
||||
rtlphy->rf_type = RF_2T2R;
|
||||
@@ -1941,7 +1939,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
|
||||
}
|
||||
}
|
||||
rtlefuse->b1ss_support = rtlefuse->b1x1_recvcombine;
|
||||
rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMID];
|
||||
rtlefuse->eeprom_oemid = *&hwinfo[EEPROM_CUSTOMID];
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x",
|
||||
rtlefuse->eeprom_oemid);
|
||||
@@ -2251,7 +2249,7 @@ void rtl92se_update_channel_access_setting(struct ieee80211_hw *hw)
|
||||
u16 sifs_timer;
|
||||
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
|
||||
(u8 *)&mac->slot_time);
|
||||
&mac->slot_time);
|
||||
sifs_timer = 0x0e0e;
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer);
|
||||
|
||||
|
@@ -599,7 +599,7 @@ void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
|
||||
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
|
||||
struct ieee80211_sta *sta = info->control.sta;
|
||||
u8 *pdesc = (u8 *) pdesc_tx;
|
||||
u8 *pdesc = pdesc_tx;
|
||||
u16 seq_number;
|
||||
__le16 fc = hdr->frame_control;
|
||||
u8 reserved_macid = 0;
|
||||
|
Reference in New Issue
Block a user