Merge branches 'arm/exynos', 'arm/omap', 'arm/rockchip', 'arm/mediatek', 'arm/smmu', 'arm/core', 'x86/vt-d', 'x86/amd' and 'core' into next
This commit is contained in:

@@ -89,6 +89,7 @@ config PCI_HISI
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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select PCIE_DW_HOST
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select PCI_HOST_COMMON
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help
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Say Y here if you want PCIe controller support on HiSilicon
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Hip05 and Hip06 SoCs
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@@ -234,6 +234,9 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6_pcie,
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return 0;
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}
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static const struct dw_pcie_ops dw_pcie_ops = {
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};
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static int artpec6_pcie_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@@ -252,6 +255,7 @@ static int artpec6_pcie_probe(struct platform_device *pdev)
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return -ENOMEM;
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pci->dev = dev;
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pci->ops = &dw_pcie_ops;
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artpec6_pcie->pci = pci;
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@@ -86,6 +86,9 @@ static int dw_plat_add_pcie_port(struct pcie_port *pp,
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return 0;
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}
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static const struct dw_pcie_ops dw_pcie_ops = {
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};
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static int dw_plat_pcie_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@@ -103,6 +106,7 @@ static int dw_plat_pcie_probe(struct platform_device *pdev)
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return -ENOMEM;
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pci->dev = dev;
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pci->ops = &dw_pcie_ops;
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dw_plat_pcie->pci = pci;
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@@ -380,9 +380,13 @@ struct pci_ecam_ops hisi_pcie_platform_ops = {
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static const struct of_device_id hisi_pcie_almost_ecam_of_match[] = {
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{
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.compatible = "hisilicon,pcie-almost-ecam",
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.compatible = "hisilicon,hip06-pcie-ecam",
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.data = (void *) &hisi_pcie_platform_ops,
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},
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{
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.compatible = "hisilicon,hip07-pcie-ecam",
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.data = (void *) &hisi_pcie_platform_ops,
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},
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{},
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};
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@@ -14,6 +14,7 @@
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* Copyright (C) 2015 - 2016 Cavium, Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_address.h>
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@@ -334,6 +335,49 @@ static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg,
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#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
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#define PEM_RES_BASE 0x87e0c0000000UL
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#define PEM_NODE_MASK GENMASK(45, 44)
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#define PEM_INDX_MASK GENMASK(26, 24)
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#define PEM_MIN_DOM_IN_NODE 4
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#define PEM_MAX_DOM_IN_NODE 10
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static void thunder_pem_reserve_range(struct device *dev, int seg,
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struct resource *r)
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{
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resource_size_t start = r->start, end = r->end;
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struct resource *res;
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const char *regionid;
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regionid = kasprintf(GFP_KERNEL, "PEM RC:%d", seg);
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if (!regionid)
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return;
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res = request_mem_region(start, end - start + 1, regionid);
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if (res)
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res->flags &= ~IORESOURCE_BUSY;
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else
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kfree(regionid);
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dev_info(dev, "%pR %s reserved\n", r,
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res ? "has been" : "could not be");
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}
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static void thunder_pem_legacy_fw(struct acpi_pci_root *root,
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struct resource *res_pem)
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{
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int node = acpi_get_node(root->device->handle);
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int index;
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if (node == NUMA_NO_NODE)
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node = 0;
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index = root->segment - PEM_MIN_DOM_IN_NODE;
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index -= node * PEM_MAX_DOM_IN_NODE;
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res_pem->start = PEM_RES_BASE | FIELD_PREP(PEM_NODE_MASK, node) |
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FIELD_PREP(PEM_INDX_MASK, index);
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res_pem->flags = IORESOURCE_MEM;
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}
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static int thunder_pem_acpi_init(struct pci_config_window *cfg)
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{
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struct device *dev = cfg->parent;
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@@ -346,10 +390,24 @@ static int thunder_pem_acpi_init(struct pci_config_window *cfg)
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if (!res_pem)
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return -ENOMEM;
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ret = acpi_get_rc_resources(dev, "THRX0002", root->segment, res_pem);
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ret = acpi_get_rc_resources(dev, "CAVA02B", root->segment, res_pem);
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/*
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* If we fail to gather resources it means that we run with old
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* FW where we need to calculate PEM-specific resources manually.
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*/
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if (ret) {
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dev_err(dev, "can't get rc base address\n");
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return ret;
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thunder_pem_legacy_fw(root, res_pem);
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/*
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* Reserve 64K size PEM specific resources. The full 16M range
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* size is required for thunder_pem_init() call.
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*/
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res_pem->end = res_pem->start + SZ_64K - 1;
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thunder_pem_reserve_range(dev, root->segment, res_pem);
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res_pem->end = res_pem->start + SZ_16M - 1;
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/* Reserve PCI configuration space as well. */
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thunder_pem_reserve_range(dev, root->segment, &cfg->res);
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}
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return thunder_pem_init(dev, cfg, res_pem);
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@@ -44,8 +44,7 @@ static int iproc_pcie_bcma_probe(struct bcma_device *bdev)
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{
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struct device *dev = &bdev->dev;
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struct iproc_pcie *pcie;
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LIST_HEAD(res);
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struct resource res_mem;
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LIST_HEAD(resources);
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int ret;
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pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
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@@ -63,22 +62,23 @@ static int iproc_pcie_bcma_probe(struct bcma_device *bdev)
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pcie->base_addr = bdev->addr;
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res_mem.start = bdev->addr_s[0];
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res_mem.end = bdev->addr_s[0] + SZ_128M - 1;
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res_mem.name = "PCIe MEM space";
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res_mem.flags = IORESOURCE_MEM;
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pci_add_resource(&res, &res_mem);
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pcie->mem.start = bdev->addr_s[0];
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pcie->mem.end = bdev->addr_s[0] + SZ_128M - 1;
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pcie->mem.name = "PCIe MEM space";
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pcie->mem.flags = IORESOURCE_MEM;
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pci_add_resource(&resources, &pcie->mem);
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pcie->map_irq = iproc_pcie_bcma_map_irq;
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ret = iproc_pcie_setup(pcie, &res);
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if (ret)
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ret = iproc_pcie_setup(pcie, &resources);
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if (ret) {
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dev_err(dev, "PCIe controller setup failed\n");
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pci_free_resource_list(&res);
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pci_free_resource_list(&resources);
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return ret;
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}
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bcma_set_drvdata(bdev, pcie);
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return ret;
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return 0;
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}
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static void iproc_pcie_bcma_remove(struct bcma_device *bdev)
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@@ -51,7 +51,7 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
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struct device_node *np = dev->of_node;
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struct resource reg;
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resource_size_t iobase = 0;
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LIST_HEAD(res);
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LIST_HEAD(resources);
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int ret;
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pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
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@@ -96,10 +96,10 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
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pcie->phy = NULL;
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}
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ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &iobase);
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ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &resources,
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&iobase);
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if (ret) {
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dev_err(dev,
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"unable to get PCI host bridge resources\n");
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dev_err(dev, "unable to get PCI host bridge resources\n");
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return ret;
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}
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@@ -112,14 +112,15 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
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pcie->map_irq = of_irq_parse_and_map_pci;
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}
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ret = iproc_pcie_setup(pcie, &res);
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if (ret)
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ret = iproc_pcie_setup(pcie, &resources);
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if (ret) {
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dev_err(dev, "PCIe controller setup failed\n");
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pci_free_resource_list(&res);
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pci_free_resource_list(&resources);
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return ret;
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}
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platform_set_drvdata(pdev, pcie);
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return ret;
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return 0;
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}
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static int iproc_pcie_pltfm_remove(struct platform_device *pdev)
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@@ -90,6 +90,7 @@ struct iproc_pcie {
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#ifdef CONFIG_ARM
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struct pci_sys_data sysdata;
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#endif
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struct resource mem;
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struct pci_bus *root_bus;
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struct phy *phy;
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int (*map_irq)(const struct pci_dev *, u8, u8);
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@@ -1893,33 +1893,6 @@ static void pci_set_msi_domain(struct pci_dev *dev)
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dev_set_msi_domain(&dev->dev, d);
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}
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/**
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* pci_dma_configure - Setup DMA configuration
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* @dev: ptr to pci_dev struct of the PCI device
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*
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* Function to update PCI devices's DMA configuration using the same
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* info from the OF node or ACPI node of host bridge's parent (if any).
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*/
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static void pci_dma_configure(struct pci_dev *dev)
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{
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struct device *bridge = pci_get_host_bridge_device(dev);
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if (IS_ENABLED(CONFIG_OF) &&
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bridge->parent && bridge->parent->of_node) {
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of_dma_configure(&dev->dev, bridge->parent->of_node);
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} else if (has_acpi_companion(bridge)) {
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struct acpi_device *adev = to_acpi_device_node(bridge->fwnode);
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enum dev_dma_attr attr = acpi_get_dma_attr(adev);
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if (attr == DEV_DMA_NOT_SUPPORTED)
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dev_warn(&dev->dev, "DMA not supported.\n");
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else
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acpi_dma_configure(&dev->dev, attr);
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}
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pci_put_host_bridge_device(bridge);
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}
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void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
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{
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int ret;
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@@ -1933,7 +1906,6 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
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dev->dev.dma_mask = &dev->dma_mask;
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dev->dev.dma_parms = &dev->dma_parms;
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dev->dev.coherent_dma_mask = 0xffffffffull;
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pci_dma_configure(dev);
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pci_set_dma_max_seg_size(dev, 65536);
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pci_set_dma_seg_boundary(dev, 0xffffffff);
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