powerpc/64s: Remove POWER9 DD1 support
POWER9 DD1 was never a product. It is no longer supported by upstream firmware, and it is not effectively supported in Linux due to lack of testing. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> [mpe: Remove arch_make_huge_pte() entirely] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman

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ce397d215c
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2bf1071a8d
@@ -465,23 +465,21 @@ int cxl_get_xsl9_dsnctl(struct pci_dev *dev, u64 capp_unit_id, u64 *reg)
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/* nMMU_ID Defaults to: b’000001001’*/
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xsl_dsnctl |= ((u64)0x09 << (63-28));
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if (!(cxl_is_power9_dd1())) {
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/*
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* Used to identify CAPI packets which should be sorted into
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* the Non-Blocking queues by the PHB. This field should match
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* the PHB PBL_NBW_CMPM register
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* nbwind=0x03, bits [57:58], must include capi indicator.
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* Not supported on P9 DD1.
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*/
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xsl_dsnctl |= (nbwind << (63-55));
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/*
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* Used to identify CAPI packets which should be sorted into
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* the Non-Blocking queues by the PHB. This field should match
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* the PHB PBL_NBW_CMPM register
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* nbwind=0x03, bits [57:58], must include capi indicator.
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* Not supported on P9 DD1.
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*/
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xsl_dsnctl |= (nbwind << (63-55));
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/*
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* Upper 16b address bits of ASB_Notify messages sent to the
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* system. Need to match the PHB’s ASN Compare/Mask Register.
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* Not supported on P9 DD1.
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*/
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xsl_dsnctl |= asnind;
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}
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/*
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* Upper 16b address bits of ASB_Notify messages sent to the
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* system. Need to match the PHB’s ASN Compare/Mask Register.
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* Not supported on P9 DD1.
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*/
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xsl_dsnctl |= asnind;
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*reg = xsl_dsnctl;
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return 0;
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@@ -539,15 +537,8 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter,
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/* Snoop machines */
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cxl_p1_write(adapter, CXL_PSL9_APCDEDALLOC, 0x800F000200000000ULL);
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if (cxl_is_power9_dd1()) {
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/* Disabling deadlock counter CAR */
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cxl_p1_write(adapter, CXL_PSL9_GP_CT, 0x0020000000000001ULL);
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/* Enable NORST */
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cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0x8000000000000000ULL);
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} else {
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/* Enable NORST and DD2 features */
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cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0xC000000000000000ULL);
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}
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/* Enable NORST and DD2 features */
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cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0xC000000000000000ULL);
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/*
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* Check if PSL has data-cache. We need to flush adapter datacache
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