clocksource/drivers: Add CLINT timer driver
We add a separate CLINT timer driver for Linux RISC-V M-mode (i.e. RISC-V NoMMU kernel). The CLINT MMIO device provides three things: 1. 64bit free running counter register 2. 64bit per-CPU time compare registers 3. 32bit per-CPU inter-processor interrupt registers Unlike other timer devices, CLINT provides IPI registers along with timer registers. To use CLINT IPI registers, the CLINT timer driver provides IPI related callbacks to arch/riscv. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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Palmer Dabbelt

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@@ -132,6 +132,7 @@ enum cpuhp_state {
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CPUHP_AP_MIPS_GIC_TIMER_STARTING,
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CPUHP_AP_ARC_TIMER_STARTING,
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CPUHP_AP_RISCV_TIMER_STARTING,
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CPUHP_AP_CLINT_TIMER_STARTING,
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CPUHP_AP_CSKY_TIMER_STARTING,
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CPUHP_AP_HYPERV_TIMER_STARTING,
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CPUHP_AP_KVM_STARTING,
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