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PCI: rcar: Add endpoint mode support

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Add support for R-Car PCIe controller to work in endpoint mode.

Link: https://lore.kernel.org/r/1588854799-13710-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This commit is contained in:
Lad Prabhakar
2020-05-07 13:33:18 +01:00
committed by Lorenzo Pieralisi
parent 4c0f809209
commit 2a6d0d63d9
4 changed files with 581 additions and 0 deletions
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9
drivers/pci/controller/pcie-rcar.h
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@@ -17,6 +17,7 @@
#define PCIECDR 0x000020
#define PCIEMSR 0x000028
#define PCIEINTXR 0x000400
#define ASTINTX BIT(16)
#define PCIEPHYSR 0x0007f0
#define PHYRDY BIT(0)
#define PCIEMSITXR 0x000840
@@ -55,12 +56,20 @@
/* Configuration */
#define PCICONF(x) (0x010000 + ((x) * 0x4))
#define INTDIS BIT(10)
#define PMCAP(x) (0x010040 + ((x) * 0x4))
#define MSICAP(x) (0x010050 + ((x) * 0x4))
#define MSICAP0_MSIE BIT(16)
#define MSICAP0_MMESCAP_OFFSET 17
#define MSICAP0_MMESE_OFFSET 20
#define MSICAP0_MMESE_MASK GENMASK(22, 20)
#define EXPCAP(x) (0x010070 + ((x) * 0x4))
#define VCCAP(x) (0x010100 + ((x) * 0x4))
/* link layer */
#define IDSETR0 0x011000
#define IDSETR1 0x011004
#define SUBIDSETR 0x011024
#define TLCTLR 0x011048
#define MACSR 0x011054
#define SPCHGFIN BIT(4)