rtc: ds1685: add indirect access method and remove plat_read/plat_write

SGI Octane (IP30) doesn't have RTC register directly mapped into CPU
address space, but accesses RTC registers with an address and data
register.  This is now supported by additional access functions, which
are selected by a new field in platform data. Removed plat_read/plat_write
since there is no user and their usage could introduce lifetime issue,
when functions are placed in different modules.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Acked-by: Joshua Kinard <kumba@gentoo.org>
Reviewed-by: Joshua Kinard <kumba@gentoo.org>
Link: https://lore.kernel.org/r/20191014214621.25257-1-tbogendoerfer@suse.de
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Thomas Bogendoerfer
2019-10-14 23:46:21 +02:00
committed by Alexandre Belloni
parent af818031f4
commit 299b610117
3 changed files with 58 additions and 30 deletions

View File

@@ -42,6 +42,7 @@
struct ds1685_priv {
struct rtc_device *dev;
void __iomem *regs;
void __iomem *data;
u32 regstep;
int irq_num;
bool bcd_mode;
@@ -70,12 +71,13 @@ struct ds1685_rtc_platform_data {
const bool bcd_mode;
const bool no_irq;
const bool uie_unsupported;
const bool alloc_io_resources;
u8 (*plat_read)(struct ds1685_priv *, int);
void (*plat_write)(struct ds1685_priv *, int, u8);
void (*plat_prepare_poweroff)(void);
void (*plat_wake_alarm)(void);
void (*plat_post_ram_clear)(void);
enum {
ds1685_reg_direct,
ds1685_reg_indirect
} access_type;
};