treewide: Convert uses of struct resource to resource_size(ptr)
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This commit is contained in:
@@ -203,7 +203,7 @@ static int axon_ram_probe(struct platform_device *device)
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goto failed;
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}
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bank->size = resource.end - resource.start + 1;
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bank->size = resource_size(&resource);
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if (bank->size == 0) {
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dev_err(&device->dev, "No DDR2 memory found for %s%d\n",
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@@ -148,7 +148,7 @@ unsigned int cpm_pic_init(void)
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if (ret)
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goto end;
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cpic_reg = ioremap(res.start, res.end - res.start + 1);
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cpic_reg = ioremap(res.start, resource_size(&res));
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if (cpic_reg == NULL)
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goto end;
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@@ -115,7 +115,7 @@ int cpm_muram_init(void)
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max = r.end;
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rh_attach_region(&cpm_muram_info, r.start - muram_pbase,
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r.end - r.start + 1);
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resource_size(&r));
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}
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muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
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@@ -239,7 +239,7 @@ static int __init dart_init(struct device_node *dart_node)
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DARTMAP_RPNMASK);
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/* Map in DART registers */
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dart = ioremap(r.start, r.end - r.start + 1);
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dart = ioremap(r.start, resource_size(&r));
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if (dart == NULL)
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panic("DART: Cannot map registers!");
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@@ -349,7 +349,7 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
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goto error_out;
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}
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msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
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msi->msi_regs = ioremap(res.start, resource_size(&res));
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if (!msi->msi_regs) {
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dev_err(&dev->dev, "ioremap problem failed\n");
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goto error_out;
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@@ -64,7 +64,7 @@ static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
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{
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resource_size_t pci_addr = res->start - offset;
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resource_size_t phys_addr = res->start;
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resource_size_t size = res->end - res->start + 1;
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resource_size_t size = resource_size(res);
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u32 flags = 0x80044000; /* enable & mem R/W */
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unsigned int i;
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@@ -108,7 +108,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
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char *name = hose->dn->full_name;
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pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
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(u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1);
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(u64)rsrc->start, (u64)resource_size(rsrc));
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if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) {
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win_idx = 2;
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@@ -116,7 +116,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
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end_idx = 3;
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}
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pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1);
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pci = ioremap(rsrc->start, resource_size(rsrc));
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if (!pci) {
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dev_err(hose->parent, "Unable to map ATMU registers\n");
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return;
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@@ -153,9 +153,9 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
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} else {
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pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, "
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"phy base 0x%016llx.\n",
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(u64)hose->io_resource.start,
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(u64)hose->io_resource.end - (u64)hose->io_resource.start + 1,
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(u64)hose->io_base_phys);
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(u64)hose->io_resource.start,
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(u64)resource_size(&hose->io_resource),
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(u64)hose->io_base_phys);
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out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12));
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out_be32(&pci->pow[j].potear, 0);
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out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12));
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@@ -1523,7 +1523,7 @@ int fsl_rio_setup(struct platform_device *dev)
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port->priv = priv;
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port->phys_efptr = 0x100;
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priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1);
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priv->regs_win = ioremap(regs.start, resource_size(®s));
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rio_regs_win = priv->regs_win;
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/* Probe the master port phy type */
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@@ -736,7 +736,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
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return NULL;
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}
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ipic->regs = ioremap(res.start, res.end - res.start + 1);
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ipic->regs = ioremap(res.start, resource_size(&res));
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ipic->irqhost->host_data = ipic;
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@@ -129,7 +129,7 @@ int __init mmio_nvram_init(void)
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goto out;
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}
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nvram_addr = r.start;
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mmio_nvram_len = r.end - r.start + 1;
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mmio_nvram_len = resource_size(&r);
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if ( (!mmio_nvram_len) || (!nvram_addr) ) {
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printk(KERN_WARNING "nvram: address or length is 0\n");
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ret = -EIO;
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@@ -166,7 +166,7 @@ int mpc8xx_pic_init(void)
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if (ret)
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goto out;
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siu_reg = ioremap(res.start, res.end - res.start + 1);
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siu_reg = ioremap(res.start, resource_size(&res));
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if (siu_reg == NULL) {
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ret = -EINVAL;
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goto out;
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@@ -125,11 +125,11 @@ static void mv64x60_udbg_init(void)
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of_node_put(np);
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mpsc_base = ioremap(r[0].start, r[0].end - r[0].start + 1);
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mpsc_base = ioremap(r[0].start, resource_size(&r[0]));
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if (!mpsc_base)
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return;
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mpsc_intr_cause = ioremap(r[1].start, r[1].end - r[1].start + 1);
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mpsc_intr_cause = ioremap(r[1].start, resource_size(&r[1]));
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if (!mpsc_intr_cause) {
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iounmap(mpsc_base);
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return;
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@@ -265,7 +265,7 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
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if (ppc4xx_setup_one_pci_PMM(hose, reg,
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res->start,
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res->start - hose->pci_mem_offset,
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res->end + 1 - res->start,
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resource_size(res),
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res->flags,
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j) == 0) {
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j++;
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@@ -290,7 +290,7 @@ static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
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void __iomem *reg,
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const struct resource *res)
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{
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resource_size_t size = res->end - res->start + 1;
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resource_size_t size = resource_size(res);
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u32 sa;
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/* Calculate window size */
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@@ -349,7 +349,7 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
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bus_range = of_get_property(np, "bus-range", NULL);
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/* Map registers */
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reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start);
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reg = ioremap(rsrc_reg.start, resource_size(&rsrc_reg));
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if (reg == NULL) {
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printk(KERN_ERR "%s: Can't map registers !", np->full_name);
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goto fail;
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@@ -465,7 +465,7 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
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if (ppc4xx_setup_one_pcix_POM(hose, reg,
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res->start,
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res->start - hose->pci_mem_offset,
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res->end + 1 - res->start,
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resource_size(res),
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res->flags,
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j) == 0) {
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j++;
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@@ -492,7 +492,7 @@ static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose,
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int big_pim,
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int enable_msi_hole)
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{
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resource_size_t size = res->end - res->start + 1;
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resource_size_t size = resource_size(res);
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u32 sa;
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/* RAM is always at 0 */
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@@ -555,7 +555,7 @@ static void __init ppc4xx_probe_pcix_bridge(struct device_node *np)
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bus_range = of_get_property(np, "bus-range", NULL);
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/* Map registers */
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reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start);
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reg = ioremap(rsrc_reg.start, resource_size(&rsrc_reg));
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if (reg == NULL) {
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printk(KERN_ERR "%s: Can't map registers !", np->full_name);
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goto fail;
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@@ -1604,7 +1604,7 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
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if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
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res->start,
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res->start - hose->pci_mem_offset,
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res->end + 1 - res->start,
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resource_size(res),
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res->flags,
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j) == 0) {
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j++;
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@@ -1639,7 +1639,7 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
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void __iomem *mbase,
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struct resource *res)
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{
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resource_size_t size = res->end - res->start + 1;
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resource_size_t size = resource_size(res);
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u64 sa;
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if (port->endpoint) {
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@@ -347,7 +347,7 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
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return;
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}
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qe_ic->regs = ioremap(res.start, res.end - res.start + 1);
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qe_ic->regs = ioremap(res.start, resource_size(&res));
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qe_ic->irqhost->host_data = qe_ic;
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qe_ic->hc_irq = qe_ic_irq_chip;
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@@ -41,7 +41,7 @@ int par_io_init(struct device_node *np)
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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return ret;
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par_io = ioremap(res.start, res.end - res.start + 1);
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par_io = ioremap(res.start, resource_size(&res));
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num_ports = of_get_property(np, "num-ports", NULL);
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if (num_ports)
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@@ -247,7 +247,7 @@ static int __init icp_native_init_one_node(struct device_node *np,
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return -1;
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}
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if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start))
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if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
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return -1;
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(*indx)++;
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