MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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@@ -685,6 +685,15 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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*contpc = regs->cp0_epc + dec_insn.pc_inc +
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dec_insn.next_pc_inc;
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return 1;
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case bnezcjialc_op:
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if (!cpu_has_mips_r6)
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break;
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if (!insn.i_format.rs)
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regs->regs[31] = regs->cp0_epc + 4;
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*contpc = regs->cp0_epc + dec_insn.pc_inc +
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dec_insn.next_pc_inc;
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return 1;
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#endif
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case cop0_op:
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