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Merge tag 's3c24xx-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

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Merge "Samsung S3C24XX updates for 3.16" from Kukjin Kim:

Samsung S3C24XX to use the common clock framework
- S3C2412, S3C2413, S3C2416 and S3C2443 to use CCF
- S3C2410, S3C2440, S3C2442 to use CCF
- Remove legacy samsung clock from mach-s3c24xx/

- Some of them are missed from previous pull-request
- Clock related sutff got ack from Mike and Tomasz
- Created the last commit due to missing changes
  during re-sorting because this branch is provided
  as a base to samsung clk tree.

* tag 's3c24xx-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (23 commits)
  ARM: S3C24XX: fix merge conflict
  ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversion
  ARM: S3C24XX: remove legacy clock code
  ARM: S3C24XX: convert s3c2410 to common clock framework
  ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework
  ARM: S3C24XX: add platform code for conversion to the common clock framework
  clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442
  dt-bindings: add documentation for s3c2410 clock controller
  ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
  clk: samsung: add clock driver for external clock outputs
  ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
  ARM: S3C24XX: convert s3c2412 to common clock framework
  clk: samsung: add clock controller driver for s3c2412
  dt-bindings: add documentation for s3c2412 clock controller
  clk: samsung: add plls used by the early s3c24xx cpus
  ARM: S3C24XX: only store clock registers when old clock code is active
  ARM: S3C24XX: Convert s3c2416 and s3c2443 to common clock framework
  ARM: dts: add clock data for s3c2416
  ARM: S3C24XX: prevent conflicts between ccf and non-ccf s3c24xx-socs
  clk: samsung: add clock-driver for s3c2416, s3c2443 and s3c2450
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2014-05-21 22:28:26 -07:00
parent 486ad2ede1 34c453ce16
commit 28d1079c9c
61 changed files with 2655 additions and 3223 deletions
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62
include/dt-bindings/clock/s3c2410.h Normal file
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/*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Device Tree binding constants clock controllers of Samsung S3C2410 and later.
*/
#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
/*
* Let each exported clock get a unique index, which is used on DT-enabled
* platforms to lookup the clock from a clock specifier. These indices are
* therefore considered an ABI and so must not be changed. This implies
* that new clocks should be added either in free spaces between clock groups
* or at the end.
*/
/* Core clocks. */
/* id 1 is reserved */
#define MPLL 2
#define UPLL 3
#define FCLK 4
#define HCLK 5
#define PCLK 6
#define UCLK 7
#define ARMCLK 8
/* pclk-gates */
#define PCLK_UART0 16
#define PCLK_UART1 17
#define PCLK_UART2 18
#define PCLK_I2C 19
#define PCLK_SDI 20
#define PCLK_SPI 21
#define PCLK_ADC 22
#define PCLK_AC97 23
#define PCLK_I2S 24
#define PCLK_PWM 25
#define PCLK_RTC 26
#define PCLK_GPIO 27
/* hclk-gates */
#define HCLK_LCD 32
#define HCLK_USBH 33
#define HCLK_USBD 34
#define HCLK_NAND 35
#define HCLK_CAM 36
#define CAMIF 40
/* Total number of clocks. */
#define NR_CLKS (CAMIF + 1)
#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */

73
include/dt-bindings/clock/s3c2412.h Normal file
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/*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Device Tree binding constants clock controllers of Samsung S3C2412.
*/
#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
/*
* Let each exported clock get a unique index, which is used on DT-enabled
* platforms to lookup the clock from a clock specifier. These indices are
* therefore considered an ABI and so must not be changed. This implies
* that new clocks should be added either in free spaces between clock groups
* or at the end.
*/
/* Core clocks. */
/* id 1 is reserved */
#define MPLL 2
#define UPLL 3
#define MDIVCLK 4
#define MSYSCLK 5
#define USYSCLK 6
#define HCLK 7
#define PCLK 8
#define ARMDIV 9
#define ARMCLK 10
/* Special clocks */
#define SCLK_CAM 16
#define SCLK_UART 17
#define SCLK_I2S 18
#define SCLK_USBD 19
#define SCLK_USBH 20
/* pclk-gates */
#define PCLK_WDT 32
#define PCLK_SPI 33
#define PCLK_I2S 34
#define PCLK_I2C 35
#define PCLK_ADC 36
#define PCLK_RTC 37
#define PCLK_GPIO 38
#define PCLK_UART2 39
#define PCLK_UART1 40
#define PCLK_UART0 41
#define PCLK_SDI 42
#define PCLK_PWM 43
#define PCLK_USBD 44
/* hclk-gates */
#define HCLK_HALF 48
#define HCLK_X2 49
#define HCLK_SDRAM 50
#define HCLK_USBH 51
#define HCLK_LCD 52
#define HCLK_NAND 53
#define HCLK_DMA3 54
#define HCLK_DMA2 55
#define HCLK_DMA1 56
#define HCLK_DMA0 57
/* Total number of clocks. */
#define NR_CLKS (HCLK_DMA0 + 1)
#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */

92
include/dt-bindings/clock/s3c2443.h Normal file
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/*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Device Tree binding constants clock controllers of Samsung S3C2443 and later.
*/
#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
/*
* Let each exported clock get a unique index, which is used on DT-enabled
* platforms to lookup the clock from a clock specifier. These indices are
* therefore considered an ABI and so must not be changed. This implies
* that new clocks should be added either in free spaces between clock groups
* or at the end.
*/
/* Core clocks. */
#define MSYSCLK 1
#define ESYSCLK 2
#define ARMDIV 3
#define ARMCLK 4
#define HCLK 5
#define PCLK 6
/* Special clocks */
#define SCLK_HSSPI0 16
#define SCLK_FIMD 17
#define SCLK_I2S0 18
#define SCLK_I2S1 19
#define SCLK_HSMMC1 20
#define SCLK_HSMMC_EXT 21
#define SCLK_CAM 22
#define SCLK_UART 23
#define SCLK_USBH 24
/* Muxes */
#define MUX_HSSPI0 32
#define MUX_HSSPI1 33
#define MUX_HSMMC0 34
#define MUX_HSMMC1 35
/* hclk-gates */
#define HCLK_DMA0 48
#define HCLK_DMA1 49
#define HCLK_DMA2 50
#define HCLK_DMA3 51
#define HCLK_DMA4 52
#define HCLK_DMA5 53
#define HCLK_DMA6 54
#define HCLK_DMA7 55
#define HCLK_CAM 56
#define HCLK_LCD 57
#define HCLK_USBH 58
#define HCLK_USBD 59
#define HCLK_IROM 60
#define HCLK_HSMMC0 61
#define HCLK_HSMMC1 62
#define HCLK_CFC 63
#define HCLK_SSMC 64
#define HCLK_DRAM 65
#define HCLK_2D 66
/* pclk-gates */
#define PCLK_UART0 72
#define PCLK_UART1 73
#define PCLK_UART2 74
#define PCLK_UART3 75
#define PCLK_I2C0 76
#define PCLK_SDI 77
#define PCLK_SPI0 78
#define PCLK_ADC 79
#define PCLK_AC97 80
#define PCLK_I2S0 81
#define PCLK_PWM 82
#define PCLK_WDT 83
#define PCLK_RTC 84
#define PCLK_GPIO 85
#define PCLK_SPI1 86
#define PCLK_CHIPID 87
#define PCLK_I2C1 88
#define PCLK_I2S1 89
#define PCLK_PCM 90
/* Total number of clocks. */
#define NR_CLKS (PCLK_PCM + 1)
#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */