[SCSI] lpfc 8.3.9: SLI enhancments to support new hardware.
- Add support for the INTF (Interface) PCI register. - Add support for greater than 2 page SGLs. - Add support for up to 32 bit BDE lengths. - Implement the Port Capabilities Mailbox command. - Stop checking the Minor Code in the EQE structure. Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
This commit is contained in:
James Smart
committed by
James Bottomley
James Bottomley
parent
ecfd03c6a9
commit
28baac7492
@@ -2443,7 +2443,8 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
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shost->this_id = -1;
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shost->max_cmd_len = 16;
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if (phba->sli_rev == LPFC_SLI_REV4) {
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shost->dma_boundary = LPFC_SLI4_MAX_SEGMENT_SIZE;
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shost->dma_boundary =
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phba->sli4_hba.pc_sli4_params.sge_supp_len;
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shost->sg_tablesize = phba->cfg_sg_seg_cnt;
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}
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@@ -3621,8 +3622,10 @@ static int
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lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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{
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struct lpfc_sli *psli;
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int rc;
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int i, hbq_count;
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LPFC_MBOXQ_t *mboxq;
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int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size;
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uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
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struct lpfc_mqe *mqe;
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/* Before proceed, wait for POST done and device ready */
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rc = lpfc_sli4_post_status_check(phba);
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@@ -3680,31 +3683,26 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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* used to create the sg_dma_buf_pool must be dynamically calculated.
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* 2 segments are added since the IOCB needs a command and response bde.
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* To insure that the scsi sgl does not cross a 4k page boundary only
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* sgl sizes of 1k, 2k, 4k, and 8k are supported.
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* Table of sgl sizes and seg_cnt:
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* sgl size, sg_seg_cnt total seg
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* 1k 50 52
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* 2k 114 116
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* 4k 242 244
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* 8k 498 500
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* cmd(32) + rsp(160) + (52 * sizeof(sli4_sge)) = 1024
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* cmd(32) + rsp(160) + (116 * sizeof(sli4_sge)) = 2048
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* cmd(32) + rsp(160) + (244 * sizeof(sli4_sge)) = 4096
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* cmd(32) + rsp(160) + (500 * sizeof(sli4_sge)) = 8192
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* sgl sizes of must be a power of 2.
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*/
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if (phba->cfg_sg_seg_cnt <= LPFC_DEFAULT_SG_SEG_CNT)
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phba->cfg_sg_seg_cnt = 50;
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else if (phba->cfg_sg_seg_cnt <= 114)
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phba->cfg_sg_seg_cnt = 114;
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else if (phba->cfg_sg_seg_cnt <= 242)
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phba->cfg_sg_seg_cnt = 242;
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buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) +
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((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)));
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/* Feature Level 1 hardware is limited to 2 pages */
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if ((bf_get(lpfc_sli_intf_featurelevel1, &phba->sli4_hba.sli_intf) ==
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LPFC_SLI_INTF_FEATURELEVEL1_1))
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max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE;
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else
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phba->cfg_sg_seg_cnt = 498;
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phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd)
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+ sizeof(struct fcp_rsp);
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phba->cfg_sg_dma_buf_size +=
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((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge));
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max_buf_size = LPFC_SLI4_MAX_BUF_SIZE;
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for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE;
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dma_buf_size < max_buf_size && buf_size > dma_buf_size;
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dma_buf_size = dma_buf_size << 1)
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;
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if (dma_buf_size == max_buf_size)
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phba->cfg_sg_seg_cnt = (dma_buf_size -
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sizeof(struct fcp_cmnd) - sizeof(struct fcp_rsp) -
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(2 * sizeof(struct sli4_sge))) /
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sizeof(struct sli4_sge);
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phba->cfg_sg_dma_buf_size = dma_buf_size;
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/* Initialize buffer queue management fields */
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hbq_count = lpfc_sli_hbq_count();
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@@ -3822,6 +3820,43 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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goto out_free_fcp_eq_hdl;
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}
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mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
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GFP_KERNEL);
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if (!mboxq) {
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rc = -ENOMEM;
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goto out_free_fcp_eq_hdl;
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}
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/* Get the Supported Pages. It is always available. */
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lpfc_supported_pages(mboxq);
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rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
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if (unlikely(rc)) {
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rc = -EIO;
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mempool_free(mboxq, phba->mbox_mem_pool);
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goto out_free_fcp_eq_hdl;
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}
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mqe = &mboxq->u.mqe;
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memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
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LPFC_MAX_SUPPORTED_PAGES);
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for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
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switch (pn_page[i]) {
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case LPFC_SLI4_PARAMETERS:
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phba->sli4_hba.pc_sli4_params.supported = 1;
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break;
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default:
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break;
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}
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}
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/* Read the port's SLI4 Parameters capabilities if supported. */
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if (phba->sli4_hba.pc_sli4_params.supported)
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rc = lpfc_pc_sli4_params_get(phba, mboxq);
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mempool_free(mboxq, phba->mbox_mem_pool);
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if (rc) {
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rc = -EIO;
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goto out_free_fcp_eq_hdl;
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}
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return rc;
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out_free_fcp_eq_hdl:
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@@ -4825,7 +4860,7 @@ lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
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int
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lpfc_sli4_post_status_check(struct lpfc_hba *phba)
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{
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struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad;
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struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg;
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int i, port_error = -ENODEV;
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if (!phba->sli4_hba.STAregaddr)
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@@ -4861,14 +4896,21 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
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bf_get(lpfc_hst_state_port_status, &sta_reg));
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/* Log device information */
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scratchpad.word0 = readl(phba->sli4_hba.SCRATCHPADregaddr);
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lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
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"2534 Device Info: ChipType=0x%x, SliRev=0x%x, "
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"FeatureL1=0x%x, FeatureL2=0x%x\n",
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bf_get(lpfc_scratchpad_chiptype, &scratchpad),
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bf_get(lpfc_scratchpad_slirev, &scratchpad),
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bf_get(lpfc_scratchpad_featurelevel1, &scratchpad),
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bf_get(lpfc_scratchpad_featurelevel2, &scratchpad));
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phba->sli4_hba.sli_intf.word0 = readl(phba->sli4_hba.SLIINTFregaddr);
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if (bf_get(lpfc_sli_intf_valid,
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&phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_VALID) {
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lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
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"2534 Device Info: ChipType=0x%x, SliRev=0x%x, "
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"FeatureL1=0x%x, FeatureL2=0x%x\n",
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bf_get(lpfc_sli_intf_sli_family,
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&phba->sli4_hba.sli_intf),
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bf_get(lpfc_sli_intf_slirev,
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&phba->sli4_hba.sli_intf),
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bf_get(lpfc_sli_intf_featurelevel1,
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&phba->sli4_hba.sli_intf),
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bf_get(lpfc_sli_intf_featurelevel2,
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&phba->sli4_hba.sli_intf));
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}
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phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr);
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phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr);
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/* With uncoverable error, log the error message and return error */
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@@ -4907,8 +4949,8 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba)
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LPFC_UE_MASK_LO;
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phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p +
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LPFC_UE_MASK_HI;
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phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p +
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LPFC_SCRATCHPAD;
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phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p +
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LPFC_SLI_INTF;
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}
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/**
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@@ -6981,6 +7023,73 @@ lpfc_sli4_hba_unset(struct lpfc_hba *phba)
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phba->pport->work_port_events = 0;
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}
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/**
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* lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
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* @phba: Pointer to HBA context object.
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* @mboxq: Pointer to the mailboxq memory for the mailbox command response.
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*
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* This function is called in the SLI4 code path to read the port's
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* sli4 capabilities.
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*
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* This function may be be called from any context that can block-wait
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* for the completion. The expectation is that this routine is called
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* typically from probe_one or from the online routine.
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**/
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int
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lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
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{
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int rc;
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struct lpfc_mqe *mqe;
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struct lpfc_pc_sli4_params *sli4_params;
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uint32_t mbox_tmo;
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rc = 0;
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mqe = &mboxq->u.mqe;
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/* Read the port's SLI4 Parameters port capabilities */
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lpfc_sli4_params(mboxq);
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if (!phba->sli4_hba.intr_enable)
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rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
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else {
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mbox_tmo = lpfc_mbox_tmo_val(phba, MBX_PORT_CAPABILITIES);
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rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
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}
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if (unlikely(rc))
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return 1;
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sli4_params = &phba->sli4_hba.pc_sli4_params;
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sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
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sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
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sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
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sli4_params->featurelevel_1 = bf_get(featurelevel_1,
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&mqe->un.sli4_params);
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sli4_params->featurelevel_2 = bf_get(featurelevel_2,
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&mqe->un.sli4_params);
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sli4_params->proto_types = mqe->un.sli4_params.word3;
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sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
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sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
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sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
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sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
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sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
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sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
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sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
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sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
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sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
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sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
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sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
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sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
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sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
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sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
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sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
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sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
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sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
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sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
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sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
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sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
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return rc;
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}
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/**
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* lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
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* @pdev: pointer to PCI device
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@@ -8053,11 +8162,11 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
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int rc;
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struct lpfc_sli_intf intf;
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if (pci_read_config_dword(pdev, LPFC_SLIREV_CONF_WORD, &intf.word0))
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if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
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return -ENODEV;
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if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
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(bf_get(lpfc_sli_intf_rev, &intf) == LPFC_SLIREV_CONF_SLI4))
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(bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
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rc = lpfc_pci_probe_one_s4(pdev, pid);
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else
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rc = lpfc_pci_probe_one_s3(pdev, pid);
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