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Merge branch 'i2c/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Browse Source 
Pull i2c updates from Wolfram Sang:
 "New stuff from the I2C world:

   - in the core, getting irqs from ACPI is now similar to OF

   - new driver for MediaTek MT7621/7628/7688 SoCs

   - bcm2835, i801, and tegra drivers got some more attention

   - GPIO API cleanups

   - cleanups in the core headers

   - lots of usual driver updates"

* 'i2c/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (74 commits)
  i2c: mt7621: Fix platform_no_drv_owner.cocci warnings
  i2c: cpm: remove casting dma_alloc
  dt-bindings: i2c: sun6i-p2wi: Fix the binding example
  dt-bindings: i2c: mv64xxx: Fix the example compatible
  i2c: i801: Documentation update
  i2c: i801: Add support for Intel Tiger Lake
  i2c: i801: Fix PCI ID sorting
  dt-bindings: i2c-stm32: document optional dmas
  i2c: i2c-stm32f7: Add I2C_SMBUS_I2C_BLOCK_DATA support
  i2c: core: Tidy up handling of init_irq
  i2c: core: Move ACPI gpio IRQ handling into i2c_acpi_get_irq
  i2c: core: Move ACPI IRQ handling to probe time
  i2c: acpi: Factor out getting the IRQ from ACPI
  i2c: acpi: Use available IRQ helper functions
  i2c: core: Allow whole core to use i2c_dev_irq_from_resources
  eeprom: at24: modify a comment referring to platform data
  dt-bindings: i2c: omap: Add new compatible for J721E SoCs
  dt-bindings: i2c: mv64xxx: Add YAML schemas
  dt-bindings: i2c: sun6i-p2wi: Add YAML schemas
  i2c: mt7621: Add MediaTek MT7621/7628/7688 I2C driver
  ...
This commit is contained in:
Linus Torvalds
2019-07-15 21:10:39 -07:00
parent 5fe7b600a1 cc6b9dfb2c
commit 273cbf61c3
51 changed files with 1604 additions and 643 deletions
Download Patch File Download Diff File Expand all files Collapse all files

65
Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml Normal file
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/allwinner,sun6i-a31-p2wi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
const: allwinner,sun6i-a31-p2wi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
clock-frequency:
minimum: 1
maximum: 6000000
required:
- compatible
- reg
- interrupts
- clocks
- resets
# FIXME: We should set it, but it would report all the generic
# properties as additional properties.
# additionalProperties: false
examples:
- |
i2c@1f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <100000>;
resets = <&apb0_rst 3>;
#address-cells = <1>;
#size-cells = <0>;
axp221: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
};
};
...

25
Documentation/devicetree/bindings/i2c/i2c-mt7621.txt Normal file
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MediaTek MT7621/MT7628 I2C master controller
Required properties:
- compatible: Should be one of the following:
- "mediatek,mt7621-i2c": for MT7621/MT7628/MT7688 platforms
- #address-cells: should be 1.
- #size-cells: should be 0.
- reg: Address and length of the register set for the device
- resets: phandle to the reset controller asserting this device in
reset
See ../reset/reset.txt for details.
Optional properties :
Example:
i2c: i2c@900 {
compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&rstctrl 16>;
reset-names = "i2c";
};

64
Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
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@@ -1,64 +0,0 @@
* Marvell MV64XXX I2C controller
Required properties :
- reg : Offset and length of the register set for the device
- compatible : Should be either:
- "allwinner,sun4i-a10-i2c"
- "allwinner,sun6i-a31-i2c"
- "marvell,mv64xxx-i2c"
- "marvell,mv78230-i2c"
- "marvell,mv78230-a0-i2c"
* Note: Only use "marvell,mv78230-a0-i2c" for a
very rare, initial version of the SoC which
had broken offload support. Linux
auto-detects this and sets it appropriately.
- interrupts : The interrupt number
Optional properties :
- clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
default frequency is 100kHz
- resets : phandle to the parent reset controller. Mandatory
whenever you're using the "allwinner,sun6i-a31-i2c"
compatible.
- clocks: : pointers to the reference clocks for this device, the
first one is the one used for the clock on the i2c bus,
the second one is the clock used to acces the registers
of the controller
- clock-names : names of used clocks, mandatory if the second clock is
used, the name must be "core", and "reg" (the latter is
only for Armada 7K/8K).
Examples:
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
interrupts = <29>;
clock-frequency = <100000>;
};
For the Armada XP:
i2c@11000 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
interrupts = <29>;
clock-frequency = <100000>;
};
For the Armada 7040:
i2c@701000 {
compatible = "marvell,mv78230-i2c";
reg = <0x701000 0x20>;
interrupts = <29>;
clock-frequency = <100000>;
clock-names = "core", "reg";
clocks = <&core_clock>, <&reg_clock>;
};

9
Documentation/devicetree/bindings/i2c/i2c-ocores.txt
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@@ -1,9 +1,13 @@
Device tree configuration for i2c-ocores
Required properties:
- compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
- compatible : "opencores,i2c-ocores"
"aeroflexgaisler,i2cmst"
"sifive,fu540-c000-i2c", "sifive,i2c0"
For Opencore based I2C IP block reimplemented in
FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt
for additional details.
- reg : bus address start and address range size of device
- interrupts : interrupt number
- clocks : handle to the controller clock; see the note below.
Mutually exclusive with opencores,ip-clock-frequency
- opencores,ip-clock-frequency: frequency of the controller clock in Hz;
@@ -12,6 +16,7 @@ Required properties:
- #size-cells : should be <0>
Optional properties:
- interrupts : interrupt number.
- clock-frequency : frequency of bus clock in Hz; see the note below.
Defaults to 100 KHz when the property is not specified
- reg-shift : device register offsets are shifted by this value

1
Documentation/devicetree/bindings/i2c/i2c-omap.txt
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@@ -7,6 +7,7 @@ Required properties :
"ti,omap3-i2c" for OMAP3 SoCs
"ti,omap4-i2c" for OMAP4+ SoCs
"ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
"ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs
- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
- #address-cells = <1>;
- #size-cells = <0>;

2
Documentation/devicetree/bindings/i2c/i2c-stm32.txt
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@@ -21,6 +21,8 @@ Optional properties:
100000 and 400000.
For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode
Plus are supported, possible values are 100000, 400000 and 1000000.
- dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt.
- dma-names: List of dma names. Valid names are: "rx" and "tx".
- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
For STM32F7, STM32H7 and STM32MP1 only.
- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)

41
Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt
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@@ -1,41 +0,0 @@
* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
Required properties :
- reg : Offset and length of the register set for the device.
- compatible : Should one of the following:
- "allwinner,sun6i-a31-p2wi"
- interrupts : The interrupt line connected to the P2WI peripheral.
- clocks : The gate clk connected to the P2WI peripheral.
- resets : The reset line connected to the P2WI peripheral.
Optional properties :
- clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
default frequency is 100kHz
A P2WI may contain one child node encoding a P2WI slave device.
Slave device properties:
Required properties:
- reg : the I2C slave address used during the initialization
process to switch from I2C to P2WI mode
Example:
p2wi@1f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <6000000>;
resets = <&apb0_rst 3>;
axp221: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
/* ... */
};
};

124
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml Normal file
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell MV64XXX I2C Controller Device Tree Bindings
maintainers:
- Gregory CLEMENT <gregory.clement@bootlin.com>
properties:
compatible:
oneOf:
- const: allwinner,sun4i-a10-i2c
- items:
- const: allwinner,sun7i-a20-i2c
- const: allwinner,sun4i-a10-i2c
- const: allwinner,sun6i-a31-i2c
- items:
- const: allwinner,sun8i-a23-i2c
- const: allwinner,sun6i-a31-i2c
- items:
- const: allwinner,sun8i-a83t-i2c
- const: allwinner,sun6i-a31-i2c
- items:
- const: allwinner,sun50i-a64-i2c
- const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c
- const: marvell,mv78230-i2c
- const: marvell,mv78230-a0-i2c
description:
Only use "marvell,mv78230-a0-i2c" for a very rare, initial
version of the SoC which had broken offload support. Linux
auto-detects this and sets it appropriately.
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
items:
- description: Reference clock for the I2C bus
- description: Bus clock (Only for Armada 7K/8K)
clock-names:
minItems: 1
maxItems: 2
items:
- const: core
- const: reg
description:
Mandatory if two clocks are used (only for Armada 7k and 8k).
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- allwinner,sun4i-a10-i2c
- allwinner,sun6i-a31-i2c
then:
required:
- clocks
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-i2c
then:
required:
- resets
# FIXME: We should set it, but it would report all the generic
# properties as additional properties.
# additionalProperties: false
examples:
- |
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
interrupts = <29>;
clock-frequency = <100000>;
};
- |
i2c@11000 {
compatible = "marvell,mv78230-i2c";
reg = <0x11000 0x100>;
interrupts = <29>;
clock-frequency = <100000>;
};
- |
i2c@701000 {
compatible = "marvell,mv78230-i2c";
reg = <0x701000 0x20>;
interrupts = <29>;
clock-frequency = <100000>;
clock-names = "core", "reg";
clocks = <&core_clock>, <&reg_clock>;
};
...