Merge tag 'pci-v4.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: "PCI changes for the v4.3 merge window: Enumeration: - Allocate ATS struct during enumeration (Bjorn Helgaas) - Embed ATS info directly into struct pci_dev (Bjorn Helgaas) - Reduce size of ATS structure elements (Bjorn Helgaas) - Stop caching ATS Invalidate Queue Depth (Bjorn Helgaas) - iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth (Bjorn Helgaas) - Move MPS configuration check to pci_configure_device() (Bjorn Helgaas) - Set MPS to match upstream bridge (Keith Busch) - ARM/PCI: Set MPS before pci_bus_add_devices() (Murali Karicheri) - Add pci_scan_root_bus_msi() (Lorenzo Pieralisi) - ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() (Lorenzo Pieralisi) Resource management: - Call pci_read_bridge_bases() from core instead of arch code (Lorenzo Pieralisi) PCI device hotplug: - pciehp: Remove unused interrupt events (Bjorn Helgaas) - pciehp: Remove ignored MRL sensor interrupt events (Bjorn Helgaas) - pciehp: Handle invalid data when reading from non-existent devices (Jarod Wilson) - pciehp: Simplify pcie_poll_cmd() (Yijing Wang) - Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot (Yijing Wang) - Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem (Yijing Wang) - Hold pci_slot_mutex while searching bus->slots list (Yijing Wang) Power management: - Disable async suspend/resume for JMicron multi-function SATA/AHCI (Zhang Rui) Virtualization: - Add ACS quirks for Intel I219-LM/V (Alex Williamson) - Restore ACS configuration as part of pci_restore_state() (Alexander Duyck) MSI: - Add pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu) - x86: Implement pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu) - Add helpers to manage pci_dev->irq and pci_dev->irq_managed (Jiang Liu) - Free legacy IRQ when enabling MSI/MSI-X (Jiang Liu) - ARM/PCI: Remove msi_controller from struct pci_sys_data (Lorenzo Pieralisi) - Remove unused pcibios_msi_controller() hook (Lorenzo Pieralisi) Generic host bridge driver: - Remove dependency on ARM-specific struct hw_pci (Jayachandran C) - Build setup-irq.o for arm64 (Jayachandran C) - Add arm64 support (Jayachandran C) APM X-Gene host bridge driver: - Add APM X-Gene PCIe 64-bit prefetchable window (Duc Dang) - Add support for a 64-bit prefetchable memory window (Duc Dang) - Drop owner assignment from platform_driver (Krzysztof Kozlowski) Broadcom iProc host bridge driver: - Allow BCMA bus driver to be built as module (Hauke Mehrtens) - Delete unnecessary checks before phy calls (Markus Elfring) - Add arm64 support (Ray Jui) Synopsys DesignWare host bridge driver: - Don't complain missing *config* reg space if va_cfg0 is set (Murali Karicheri) TI DRA7xx host bridge driver: - Disable pm_runtime on get_sync failure (Kishon Vijay Abraham I) - Add PM support (Kishon Vijay Abraham I) - Clear MSE bit during suspend so clocks will idle (Kishon Vijay Abraham I) - Add support to make GPIO drive PERST# line (Kishon Vijay Abraham I) Xilinx AXI host bridge driver: - Check for MSI interrupt flag before handling as INTx (Russell Joyce) Miscellaneous: - Fix Intersil/Techwell TW686[4589] AV capture class code (Krzysztof Hałasa) - Use PCI_CLASS_SERIAL_USB instead of bare number (Bjorn Helgaas) - Fix generic NCR 53c810 class code quirk (Bjorn Helgaas) - Fix TI816X class code quirk (Bjorn Helgaas) - Remove unused "pci_probe" flags (Bjorn Helgaas) - Host bridge driver code simplifications (Fabio Estevam) - Add dev_flags bit to access VPD through function 0 (Mark Rustad) - Add VPD function 0 quirk for Intel Ethernet devices (Mark Rustad) - Kill off set_irq_flags() usage (Rob Herring) - Remove Intel Cherrytrail D3 delays (Srinidhi Kasagar) - Clean up pci_find_capability() (Wei Yang)" * tag 'pci-v4.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (72 commits) PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI PCI: Set MPS to match upstream bridge PCI: Move MPS configuration check to pci_configure_device() PCI: Drop references acquired by of_parse_phandle() PCI/MSI: Remove unused pcibios_msi_controller() hook ARM/PCI: Remove msi_controller from struct pci_sys_data ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() PCI: Add pci_scan_root_bus_msi() ARM/PCI: Replace panic with WARN messages on failures PCI: generic: Add arm64 support PCI: Build setup-irq.o for arm64 PCI: generic: Remove dependency on ARM-specific struct hw_pci PCI: imx6: Simplify a trivial if-return sequence PCI: spear: Use BUG_ON() instead of condition followed by BUG() PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE() PCI: Remove pci_ats_enabled() PCI: Stop caching ATS Invalidate Queue Depth PCI: Move ATS declarations to linux/pci.h so they're all together PCI: Clean up ATS error handling PCI: Use pci_physfn() rather than looking up physfn by hand ...
This commit is contained in:
Linus Torvalds
@@ -826,6 +826,9 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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child->bridge_ctl = bctl;
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}
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/* Read and initialize bridge resources */
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pci_read_bridge_bases(child);
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cmax = pci_scan_child_bus(child);
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if (cmax > subordinate)
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dev_warn(&dev->dev, "bridge has subordinate %02x but max busn %02x\n",
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@@ -886,6 +889,9 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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if (!is_cardbus) {
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child->bridge_ctl = bctl;
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/* Read and initialize bridge resources */
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pci_read_bridge_bases(child);
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max = pci_scan_child_bus(child);
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} else {
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/*
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@@ -1138,7 +1144,6 @@ int pci_setup_device(struct pci_dev *dev)
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{
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u32 class;
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u8 hdr_type;
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struct pci_slot *slot;
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int pos = 0;
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struct pci_bus_region region;
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struct resource *res;
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@@ -1154,10 +1159,7 @@ int pci_setup_device(struct pci_dev *dev)
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dev->error_state = pci_channel_io_normal;
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set_pcie_port_type(dev);
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list_for_each_entry(slot, &dev->bus->slots, list)
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if (PCI_SLOT(dev->devfn) == slot->number)
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dev->slot = slot;
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pci_dev_assign_slot(dev);
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/* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
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set this higher, assuming the system even supports it. */
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dev->dma_mask = 0xffffffff;
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@@ -1273,13 +1275,51 @@ int pci_setup_device(struct pci_dev *dev)
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bad:
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dev_err(&dev->dev, "ignoring class %#08x (doesn't match header type %02x)\n",
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dev->class, dev->hdr_type);
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dev->class = PCI_CLASS_NOT_DEFINED;
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dev->class = PCI_CLASS_NOT_DEFINED << 8;
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}
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/* We found a fine healthy device, go go go... */
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return 0;
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}
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static void pci_configure_mps(struct pci_dev *dev)
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{
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struct pci_dev *bridge = pci_upstream_bridge(dev);
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int mps, p_mps, rc;
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if (!pci_is_pcie(dev) || !bridge || !pci_is_pcie(bridge))
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return;
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mps = pcie_get_mps(dev);
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p_mps = pcie_get_mps(bridge);
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if (mps == p_mps)
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return;
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if (pcie_bus_config == PCIE_BUS_TUNE_OFF) {
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dev_warn(&dev->dev, "Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n",
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mps, pci_name(bridge), p_mps);
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return;
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}
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/*
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* Fancier MPS configuration is done later by
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* pcie_bus_configure_settings()
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*/
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if (pcie_bus_config != PCIE_BUS_DEFAULT)
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return;
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rc = pcie_set_mps(dev, p_mps);
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if (rc) {
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dev_warn(&dev->dev, "can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n",
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p_mps);
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return;
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}
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dev_info(&dev->dev, "Max Payload Size set to %d (was %d, max %d)\n",
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p_mps, mps, 128 << dev->pcie_mpss);
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}
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static struct hpp_type0 pci_default_type0 = {
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.revision = 1,
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.cache_line_size = 8,
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@@ -1401,6 +1441,8 @@ static void pci_configure_device(struct pci_dev *dev)
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struct hotplug_params hpp;
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int ret;
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pci_configure_mps(dev);
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memset(&hpp, 0, sizeof(hpp));
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ret = pci_get_hp_params(dev, &hpp);
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if (ret)
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@@ -1545,6 +1587,9 @@ static void pci_init_capabilities(struct pci_dev *dev)
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/* Single Root I/O Virtualization */
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pci_iov_init(dev);
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/* Address Translation Services */
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pci_ats_init(dev);
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/* Enable ACS P2P upstream forwarding */
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pci_enable_acs(dev);
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}
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@@ -1796,22 +1841,6 @@ static void pcie_write_mrrs(struct pci_dev *dev)
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dev_err(&dev->dev, "MRRS was unable to be configured with a safe value. If problems are experienced, try running with pci=pcie_bus_safe\n");
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}
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static void pcie_bus_detect_mps(struct pci_dev *dev)
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{
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struct pci_dev *bridge = dev->bus->self;
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int mps, p_mps;
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if (!bridge)
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return;
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mps = pcie_get_mps(dev);
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p_mps = pcie_get_mps(bridge);
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if (mps != p_mps)
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dev_warn(&dev->dev, "Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n",
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mps, pci_name(bridge), p_mps);
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}
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static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
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{
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int mps, orig_mps;
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@@ -1819,10 +1848,9 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
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if (!pci_is_pcie(dev))
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return 0;
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if (pcie_bus_config == PCIE_BUS_TUNE_OFF) {
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pcie_bus_detect_mps(dev);
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if (pcie_bus_config == PCIE_BUS_TUNE_OFF ||
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pcie_bus_config == PCIE_BUS_DEFAULT)
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return 0;
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}
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mps = 128 << *(u8 *)data;
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orig_mps = pcie_get_mps(dev);
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@@ -2101,8 +2129,9 @@ void pci_bus_release_busn_res(struct pci_bus *b)
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res, ret ? "can not be" : "is");
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}
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struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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struct pci_ops *ops, void *sysdata, struct list_head *resources)
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struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
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struct pci_ops *ops, void *sysdata,
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struct list_head *resources, struct msi_controller *msi)
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{
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struct resource_entry *window;
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bool found = false;
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@@ -2119,6 +2148,8 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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if (!b)
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return NULL;
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b->msi = msi;
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if (!found) {
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dev_info(&b->dev,
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"No busn resource found for root bus, will use [bus %02x-ff]\n",
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@@ -2133,6 +2164,13 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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return b;
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}
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struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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struct pci_ops *ops, void *sysdata, struct list_head *resources)
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{
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return pci_scan_root_bus_msi(parent, bus, ops, sysdata, resources,
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NULL);
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}
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EXPORT_SYMBOL(pci_scan_root_bus);
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struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
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