drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling support
Add support for SCDC Setup for TMDS Clock > 3.4GHz and enable TMDS Scrambling when supported or mandatory. This patch also adds an helper to setup the control bit to support the high TMDS Bit Period/TMDS Clock-Period Ratio as required with TMDS Clock > 3.4GHz for HDMI2.0 3840x2160@60/50 modes. These changes were based on work done by Huicong Xu <xhc@rock-chips.com> and Nickey Yang <nickey.yang@rock-chips.com> to support HDMI2.0 modes on the Rockchip 4.4 BSP kernel at [1] [1] https://github.com/rockchip-linux/kernel/tree/release-4.4 Cc: Nickey Yang <nickey.yang@rock-chips.com> Cc: Huicong Xu <xhc@rock-chips.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549022873-40549-2-git-send-email-narmstrong@baylibre.com
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Andrzej Hajda

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d60ea31a87
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264fce6cc2
@@ -159,6 +159,7 @@ void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
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void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
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void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
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void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
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void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi);
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/* PHY configuration */
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void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address);
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