ARM: OMAP3: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to OMAP3 clock code to make it COMMON clk ready, not that CONFIG_COMMON_CLK is enabled. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@ti.com> [paul@pwsan.com: remove some ifdefs in mach-omap2/io.c] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley

parent
13a5b62286
commit
25f4214e38
@@ -37,28 +37,18 @@
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* (Any other value different from the Read value) to the
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* corresponding CM_CLKSEL register will refresh the dividers.
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*/
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#ifdef CONFIG_COMMON_CLK
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int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
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{
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struct clk_hw_omap *parent;
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struct clk_hw *parent_hw;
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#else
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static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
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{
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struct clk *parent;
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#endif
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u32 dummy_v, orig_v, clksel_shift;
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int ret;
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/* Clear PWRDN bit of HSDIVIDER */
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ret = omap2_dflt_clk_enable(clk);
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#ifdef CONFIG_COMMON_CLK
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parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
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parent = to_clk_hw_omap(parent_hw);
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#else
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parent = clk->parent;
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#endif
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/* Restore the dividers */
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if (!ret) {
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@@ -76,12 +66,3 @@ static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
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return ret;
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}
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#ifndef CONFIG_COMMON_CLK
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const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = {
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.enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
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.disable = omap2_dflt_clk_disable,
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.find_companion = omap2_clk_dflt_find_companion,
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.find_idlest = omap2_clk_dflt_find_idlest,
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};
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#endif
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