xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[S390] Whitespace cleanup.

Browse Source 
Huge s390 assembly files whitespace cleanup.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Heiko Carstens
2006-09-28 16:56:37 +02:00
committed by Martin Schwidefsky
parent 52149ba6b0
commit 25d83cbfaa
9 changed files with 1357 additions and 1363 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
arch/s390/kernel/relocate_kernel64.S
View File

@@ -3,7 +3,7 @@
*
* (C) Copyright IBM Corp. 2005
*
* Author(s): Rolf Adelsberger <adelsberger@de.ibm.com>
* Author(s): Rolf Adelsberger,
* Heiko Carstens <heiko.carstens@de.ibm.com>
*
*/
@@ -25,10 +25,10 @@
.text
.globl relocate_kernel
relocate_kernel:
basr %r13,0 #base address
basr %r13,0 # base address
.base:
stnsm sys_msk-.base(%r13),0xf8 #disable DAT and IRQs
spx zero64-.base(%r13) #absolute addressing mode
stnsm sys_msk-.base(%r13),0xf8 # disable DAT and IRQs
spx zero64-.base(%r13) # absolute addressing mode
stctg %c0,%c15,ctlregs-.base(%r13)
stmg %r0,%r15,gprregs-.base(%r13)
lghi %r0,3
@@ -37,16 +37,16 @@
la %r0,.back_pgm-.base(%r13)
stg %r0,0x1d8(%r0)
la %r1,load_psw-.base(%r13)
mvc 0(8,%r0),0(%r1)
mvc 0(8,%r0),0(%r1)
la %r0,.back-.base(%r13)
st %r0,4(%r0)
oi 4(%r0),0x80
lghi %r0,0
diag %r0,%r0,0x308
.back:
lhi %r1,1 #mode 1 = esame
sigp %r1,%r0,0x12 #switch to esame mode
sam64 #switch to 64 bit addressing mode
lhi %r1,1 # mode 1 = esame
sigp %r1,%r0,0x12 # switch to esame mode
sam64 # switch to 64 bit addressing mode
basr %r13,0
.back_base:
oi have_diag308-.back_base(%r13),0x01
@@ -56,50 +56,50 @@
.back_pgm:
lmg %r0,%r15,gprregs-.base(%r13)
.top:
lghi %r7,4096 #load PAGE_SIZE in r7
lghi %r9,4096 #load PAGE_SIZE in r9
lg %r5,0(%r2) #read another word for indirection page
aghi %r2,8 #increment pointer
tml %r5,0x1 #is it a destination page?
je .indir_check #NO, goto "indir_check"
lgr %r6,%r5 #r6 = r5
nill %r6,0xf000 #mask it out and...
j .top #...next iteration
lghi %r7,4096 # load PAGE_SIZE in r7
lghi %r9,4096 # load PAGE_SIZE in r9
lg %r5,0(%r2) # read another word for indirection page
aghi %r2,8 # increment pointer
tml %r5,0x1 # is it a destination page?
je .indir_check # NO, goto "indir_check"
lgr %r6,%r5 # r6 = r5
nill %r6,0xf000 # mask it out and...
j .top # ...next iteration
.indir_check:
tml %r5,0x2 #is it a indirection page?
je .done_test #NO, goto "done_test"
nill %r5,0xf000 #YES, mask out,
lgr %r2,%r5 #move it into the right register,
j .top #and read next...
tml %r5,0x2 # is it a indirection page?
je .done_test # NO, goto "done_test"
nill %r5,0xf000 # YES, mask out,
lgr %r2,%r5 # move it into the right register,
j .top # and read next...
.done_test:
tml %r5,0x4 #is it the done indicator?
je .source_test #NO! Well, then it should be the source indicator...
j .done #ok, lets finish it here...
tml %r5,0x4 # is it the done indicator?
je .source_test # NO! Well, then it should be the source indicator...
j .done # ok, lets finish it here...
.source_test:
tml %r5,0x8 #it should be a source indicator...
je .top #NO, ignore it...
lgr %r8,%r5 #r8 = r5
nill %r8,0xf000 #masking
0: mvcle %r6,%r8,0x0 #copy PAGE_SIZE bytes from r8 to r6 - pad with 0
tml %r5,0x8 # it should be a source indicator...
je .top # NO, ignore it...
lgr %r8,%r5 # r8 = r5
nill %r8,0xf000 # masking
0: mvcle %r6,%r8,0x0 # copy PAGE_SIZE bytes from r8 to r6 - pad with 0
jo 0b
j .top
j .top
.done:
sgr %r0,%r0 #clear register r0
la %r4,load_psw-.base(%r13) #load psw-address into the register
o %r3,4(%r4) #or load address into psw
sgr %r0,%r0 # clear register r0
la %r4,load_psw-.base(%r13) # load psw-address into the register
o %r3,4(%r4) # or load address into psw
st %r3,4(%r4)
mvc 0(8,%r0),0(%r4) #copy psw to absolute address 0
mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
tm have_diag308-.base(%r13),0x01
jno .no_diag308
diag %r0,%r0,0x308
.no_diag308:
sam31 #31 bit mode
sr %r1,%r1 #erase register r1
sr %r2,%r2 #erase register r2
sigp %r1,%r2,0x12 #set cpuid to zero
lpsw 0 #hopefully start new kernel...
sam31 # 31 bit mode
sr %r1,%r1 # erase register r1
sr %r2,%r2 # erase register r2
sigp %r1,%r2,0x12 # set cpuid to zero
lpsw 0 # hopefully start new kernel...
.align 8
.align 8
zero64:
.quad 0
load_psw: