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b43: flush some writes on Broadcom MIPS SoCs

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Access to PHY and radio registers is indirect on Broadcom hardware and
it seems that addressing on some MIPS SoCs may require flushing. So far
this problem was noticed on 0x4716 SoC only (marketing names: BCM4717,
BCM4718).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
2014-08-07 07:45:37 +02:00
committed by John W. Linville
parent d342b95dd7
commit 25c1556663
11 changed files with 49 additions and 29 deletions
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4
drivers/net/wireless/b43/phy_common.c
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@@ -278,7 +278,7 @@ u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
if (dev->phy.ops->phy_read)
return dev->phy.ops->phy_read(dev, reg);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
}
@@ -294,7 +294,7 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
if (dev->phy.ops->phy_write)
return dev->phy.ops->phy_write(dev, reg, value);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
}