[media] Rename media/dvb as media/pci

The remaining dvb drivers are pci, so rename them to match the
bus.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Этот коммит содержится в:
Mauro Carvalho Chehab
2012-06-14 16:35:57 -03:00
родитель 786baecfe7
Коммит 25aee3debe
126 изменённых файлов: 13 добавлений и 13 удалений

13
drivers/media/pci/ngene/Kconfig Обычный файл
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@@ -0,0 +1,13 @@
config DVB_NGENE
tristate "Micronas nGene support"
depends on DVB_CORE && PCI && I2C
select DVB_LNBP21 if !DVB_FE_CUSTOMISE
select DVB_STV6110x if !DVB_FE_CUSTOMISE
select DVB_STV090x if !DVB_FE_CUSTOMISE
select DVB_LGDT330X if !DVB_FE_CUSTOMISE
select DVB_DRXK if !DVB_FE_CUSTOMISE
select DVB_TDA18271C2DD if !DVB_FE_CUSTOMISE
select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE
---help---
Support for Micronas PCI express cards with nGene bridge.

14
drivers/media/pci/ngene/Makefile Обычный файл
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@@ -0,0 +1,14 @@
#
# Makefile for the nGene device driver
#
ngene-objs := ngene-core.o ngene-i2c.o ngene-cards.o ngene-dvb.o
obj-$(CONFIG_DVB_NGENE) += ngene.o
ccflags-y += -Idrivers/media/dvb-core/
ccflags-y += -Idrivers/media/dvb-frontends/
ccflags-y += -Idrivers/media/common/tuners/
# For the staging CI driver cxd2099
ccflags-y += -Idrivers/staging/media/cxd2099/

823
drivers/media/pci/ngene/ngene-cards.c Обычный файл
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@@ -0,0 +1,823 @@
/*
* ngene-cards.c: nGene PCIe bridge driver - card specific info
*
* Copyright (C) 2005-2007 Micronas
*
* Copyright (C) 2008-2009 Ralph Metzler <rjkm@metzlerbros.de>
* Modifications for new nGene firmware,
* support for EEPROM-copying,
* support for new dual DVB-S2 card prototype
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 only, as published by the Free Software Foundation.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include "ngene.h"
/* demods/tuners */
#include "stv6110x.h"
#include "stv090x.h"
#include "lnbh24.h"
#include "lgdt330x.h"
#include "mt2131.h"
#include "tda18271c2dd.h"
#include "drxk.h"
#include "drxd.h"
#include "dvb-pll.h"
/****************************************************************************/
/* Demod/tuner attachment ***************************************************/
/****************************************************************************/
static int tuner_attach_stv6110(struct ngene_channel *chan)
{
struct i2c_adapter *i2c;
struct stv090x_config *feconf = (struct stv090x_config *)
chan->dev->card_info->fe_config[chan->number];
struct stv6110x_config *tunerconf = (struct stv6110x_config *)
chan->dev->card_info->tuner_config[chan->number];
struct stv6110x_devctl *ctl;
/* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
if (chan->number < 2)
i2c = &chan->dev->channel[0].i2c_adapter;
else
i2c = &chan->dev->channel[1].i2c_adapter;
ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf, i2c);
if (ctl == NULL) {
printk(KERN_ERR DEVICE_NAME ": No STV6110X found!\n");
return -ENODEV;
}
feconf->tuner_init = ctl->tuner_init;
feconf->tuner_sleep = ctl->tuner_sleep;
feconf->tuner_set_mode = ctl->tuner_set_mode;
feconf->tuner_set_frequency = ctl->tuner_set_frequency;
feconf->tuner_get_frequency = ctl->tuner_get_frequency;
feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
feconf->tuner_set_refclk = ctl->tuner_set_refclk;
feconf->tuner_get_status = ctl->tuner_get_status;
return 0;
}
static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
{
struct ngene_channel *chan = fe->sec_priv;
int status;
if (enable) {
down(&chan->dev->pll_mutex);
status = chan->gate_ctrl(fe, 1);
} else {
status = chan->gate_ctrl(fe, 0);
up(&chan->dev->pll_mutex);
}
return status;
}
static int tuner_attach_tda18271(struct ngene_channel *chan)
{
struct i2c_adapter *i2c;
struct dvb_frontend *fe;
i2c = &chan->dev->channel[0].i2c_adapter;
if (chan->fe->ops.i2c_gate_ctrl)
chan->fe->ops.i2c_gate_ctrl(chan->fe, 1);
fe = dvb_attach(tda18271c2dd_attach, chan->fe, i2c, 0x60);
if (chan->fe->ops.i2c_gate_ctrl)
chan->fe->ops.i2c_gate_ctrl(chan->fe, 0);
if (!fe) {
printk(KERN_ERR "No TDA18271 found!\n");
return -ENODEV;
}
return 0;
}
static int tuner_attach_probe(struct ngene_channel *chan)
{
if (chan->demod_type == 0)
return tuner_attach_stv6110(chan);
if (chan->demod_type == 1)
return tuner_attach_tda18271(chan);
return -EINVAL;
}
static int demod_attach_stv0900(struct ngene_channel *chan)
{
struct i2c_adapter *i2c;
struct stv090x_config *feconf = (struct stv090x_config *)
chan->dev->card_info->fe_config[chan->number];
/* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
/* Note: Both adapters share the same i2c bus, but the demod */
/* driver requires that each demod has its own i2c adapter */
if (chan->number < 2)
i2c = &chan->dev->channel[0].i2c_adapter;
else
i2c = &chan->dev->channel[1].i2c_adapter;
chan->fe = dvb_attach(stv090x_attach, feconf, i2c,
(chan->number & 1) == 0 ? STV090x_DEMODULATOR_0
: STV090x_DEMODULATOR_1);
if (chan->fe == NULL) {
printk(KERN_ERR DEVICE_NAME ": No STV0900 found!\n");
return -ENODEV;
}
/* store channel info */
if (feconf->tuner_i2c_lock)
chan->fe->analog_demod_priv = chan;
if (!dvb_attach(lnbh24_attach, chan->fe, i2c, 0,
0, chan->dev->card_info->lnb[chan->number])) {
printk(KERN_ERR DEVICE_NAME ": No LNBH24 found!\n");
dvb_frontend_detach(chan->fe);
chan->fe = NULL;
return -ENODEV;
}
return 0;
}
static void cineS2_tuner_i2c_lock(struct dvb_frontend *fe, int lock)
{
struct ngene_channel *chan = fe->analog_demod_priv;
if (lock)
down(&chan->dev->pll_mutex);
else
up(&chan->dev->pll_mutex);
}
static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
{
struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
.buf = val, .len = 1 } };
return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
}
static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
u16 reg, u8 *val)
{
u8 msg[2] = {reg>>8, reg&0xff};
struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
.buf = msg, .len = 2},
{.addr = adr, .flags = I2C_M_RD,
.buf = val, .len = 1} };
return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
}
static int port_has_stv0900(struct i2c_adapter *i2c, int port)
{
u8 val;
if (i2c_read_reg16(i2c, 0x68+port/2, 0xf100, &val) < 0)
return 0;
return 1;
}
static int port_has_drxk(struct i2c_adapter *i2c, int port)
{
u8 val;
if (i2c_read(i2c, 0x29+port, &val) < 0)
return 0;
return 1;
}
static int demod_attach_drxk(struct ngene_channel *chan,
struct i2c_adapter *i2c)
{
struct drxk_config config;
memset(&config, 0, sizeof(config));
config.microcode_name = "drxk_a3.mc";
config.qam_demod_parameter_count = 4;
config.adr = 0x29 + (chan->number ^ 2);
chan->fe = dvb_attach(drxk_attach, &config, i2c);
if (!chan->fe) {
printk(KERN_ERR "No DRXK found!\n");
return -ENODEV;
}
chan->fe->sec_priv = chan;
chan->gate_ctrl = chan->fe->ops.i2c_gate_ctrl;
chan->fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
return 0;
}
static int cineS2_probe(struct ngene_channel *chan)
{
struct i2c_adapter *i2c;
struct stv090x_config *fe_conf;
u8 buf[3];
struct i2c_msg i2c_msg = { .flags = 0, .buf = buf };
int rc;
/* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
if (chan->number < 2)
i2c = &chan->dev->channel[0].i2c_adapter;
else
i2c = &chan->dev->channel[1].i2c_adapter;
if (port_has_stv0900(i2c, chan->number)) {
chan->demod_type = 0;
fe_conf = chan->dev->card_info->fe_config[chan->number];
/* demod found, attach it */
rc = demod_attach_stv0900(chan);
if (rc < 0 || chan->number < 2)
return rc;
/* demod #2: reprogram outputs DPN1 & DPN2 */
i2c_msg.addr = fe_conf->address;
i2c_msg.len = 3;
buf[0] = 0xf1;
switch (chan->number) {
case 2:
buf[1] = 0x5c;
buf[2] = 0xc2;
break;
case 3:
buf[1] = 0x61;
buf[2] = 0xcc;
break;
default:
return -ENODEV;
}
rc = i2c_transfer(i2c, &i2c_msg, 1);
if (rc != 1) {
printk(KERN_ERR DEVICE_NAME ": could not setup DPNx\n");
return -EIO;
}
} else if (port_has_drxk(i2c, chan->number^2)) {
chan->demod_type = 1;
demod_attach_drxk(chan, i2c);
} else {
printk(KERN_ERR "No demod found on chan %d\n", chan->number);
return -ENODEV;
}
return 0;
}
static struct lgdt330x_config aver_m780 = {
.demod_address = 0xb2 >> 1,
.demod_chip = LGDT3303,
.serial_mpeg = 0x00, /* PARALLEL */
.clock_polarity_flip = 1,
};
static struct mt2131_config m780_tunerconfig = {
0xc0 >> 1
};
/* A single func to attach the demo and tuner, rather than
* use two sep funcs like the current design mandates.
*/
static int demod_attach_lg330x(struct ngene_channel *chan)
{
chan->fe = dvb_attach(lgdt330x_attach, &aver_m780, &chan->i2c_adapter);
if (chan->fe == NULL) {
printk(KERN_ERR DEVICE_NAME ": No LGDT330x found!\n");
return -ENODEV;
}
dvb_attach(mt2131_attach, chan->fe, &chan->i2c_adapter,
&m780_tunerconfig, 0);
return (chan->fe) ? 0 : -ENODEV;
}
static int demod_attach_drxd(struct ngene_channel *chan)
{
struct drxd_config *feconf;
feconf = chan->dev->card_info->fe_config[chan->number];
chan->fe = dvb_attach(drxd_attach, feconf, chan,
&chan->i2c_adapter, &chan->dev->pci_dev->dev);
if (!chan->fe) {
pr_err("No DRXD found!\n");
return -ENODEV;
}
if (!dvb_attach(dvb_pll_attach, chan->fe, feconf->pll_address,
&chan->i2c_adapter,
feconf->pll_type)) {
pr_err("No pll(%d) found!\n", feconf->pll_type);
return -ENODEV;
}
return 0;
}
/****************************************************************************/
/* EEPROM TAGS **************************************************************/
/****************************************************************************/
#define MICNG_EE_START 0x0100
#define MICNG_EE_END 0x0FF0
#define MICNG_EETAG_END0 0x0000
#define MICNG_EETAG_END1 0xFFFF
/* 0x0001 - 0x000F reserved for housekeeping */
/* 0xFFFF - 0xFFFE reserved for housekeeping */
/* Micronas assigned tags
EEProm tags for hardware support */
#define MICNG_EETAG_DRXD1_OSCDEVIATION 0x1000 /* 2 Bytes data */
#define MICNG_EETAG_DRXD2_OSCDEVIATION 0x1001 /* 2 Bytes data */
#define MICNG_EETAG_MT2060_1_1STIF 0x1100 /* 2 Bytes data */
#define MICNG_EETAG_MT2060_2_1STIF 0x1101 /* 2 Bytes data */
/* Tag range for OEMs */
#define MICNG_EETAG_OEM_FIRST 0xC000
#define MICNG_EETAG_OEM_LAST 0xFFEF
static int i2c_write_eeprom(struct i2c_adapter *adapter,
u8 adr, u16 reg, u8 data)
{
u8 m[3] = {(reg >> 8), (reg & 0xff), data};
struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m,
.len = sizeof(m)};
if (i2c_transfer(adapter, &msg, 1) != 1) {
pr_err(DEVICE_NAME ": Error writing EEPROM!\n");
return -EIO;
}
return 0;
}
static int i2c_read_eeprom(struct i2c_adapter *adapter,
u8 adr, u16 reg, u8 *data, int len)
{
u8 msg[2] = {(reg >> 8), (reg & 0xff)};
struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
.buf = msg, .len = 2 },
{.addr = adr, .flags = I2C_M_RD,
.buf = data, .len = len} };
if (i2c_transfer(adapter, msgs, 2) != 2) {
pr_err(DEVICE_NAME ": Error reading EEPROM\n");
return -EIO;
}
return 0;
}
static int ReadEEProm(struct i2c_adapter *adapter,
u16 Tag, u32 MaxLen, u8 *data, u32 *pLength)
{
int status = 0;
u16 Addr = MICNG_EE_START, Length, tag = 0;
u8 EETag[3];
while (Addr + sizeof(u16) + 1 < MICNG_EE_END) {
if (i2c_read_eeprom(adapter, 0x50, Addr, EETag, sizeof(EETag)))
return -1;
tag = (EETag[0] << 8) | EETag[1];
if (tag == MICNG_EETAG_END0 || tag == MICNG_EETAG_END1)
return -1;
if (tag == Tag)
break;
Addr += sizeof(u16) + 1 + EETag[2];
}
if (Addr + sizeof(u16) + 1 + EETag[2] > MICNG_EE_END) {
pr_err(DEVICE_NAME
": Reached EOEE @ Tag = %04x Length = %3d\n",
tag, EETag[2]);
return -1;
}
Length = EETag[2];
if (Length > MaxLen)
Length = (u16) MaxLen;
if (Length > 0) {
Addr += sizeof(u16) + 1;
status = i2c_read_eeprom(adapter, 0x50, Addr, data, Length);
if (!status) {
*pLength = EETag[2];
if (Length < EETag[2])
; /*status=STATUS_BUFFER_OVERFLOW; */
}
}
return status;
}
static int WriteEEProm(struct i2c_adapter *adapter,
u16 Tag, u32 Length, u8 *data)
{
int status = 0;
u16 Addr = MICNG_EE_START;
u8 EETag[3];
u16 tag = 0;
int retry, i;
while (Addr + sizeof(u16) + 1 < MICNG_EE_END) {
if (i2c_read_eeprom(adapter, 0x50, Addr, EETag, sizeof(EETag)))
return -1;
tag = (EETag[0] << 8) | EETag[1];
if (tag == MICNG_EETAG_END0 || tag == MICNG_EETAG_END1)
return -1;
if (tag == Tag)
break;
Addr += sizeof(u16) + 1 + EETag[2];
}
if (Addr + sizeof(u16) + 1 + EETag[2] > MICNG_EE_END) {
pr_err(DEVICE_NAME
": Reached EOEE @ Tag = %04x Length = %3d\n",
tag, EETag[2]);
return -1;
}
if (Length > EETag[2])
return -EINVAL;
/* Note: We write the data one byte at a time to avoid
issues with page sizes. (which are different for
each manufacture and eeprom size)
*/
Addr += sizeof(u16) + 1;
for (i = 0; i < Length; i++, Addr++) {
status = i2c_write_eeprom(adapter, 0x50, Addr, data[i]);
if (status)
break;
/* Poll for finishing write cycle */
retry = 10;
while (retry) {
u8 Tmp;
msleep(50);
status = i2c_read_eeprom(adapter, 0x50, Addr, &Tmp, 1);
if (status)
break;
if (Tmp != data[i])
pr_err(DEVICE_NAME
"eeprom write error\n");
retry -= 1;
}
if (status) {
pr_err(DEVICE_NAME
": Timeout polling eeprom\n");
break;
}
}
return status;
}
static int eeprom_read_ushort(struct i2c_adapter *adapter, u16 tag, u16 *data)
{
int stat;
u8 buf[2];
u32 len = 0;
stat = ReadEEProm(adapter, tag, 2, buf, &len);
if (stat)
return stat;
if (len != 2)
return -EINVAL;
*data = (buf[0] << 8) | buf[1];
return 0;
}
static int eeprom_write_ushort(struct i2c_adapter *adapter, u16 tag, u16 data)
{
int stat;
u8 buf[2];
buf[0] = data >> 8;
buf[1] = data & 0xff;
stat = WriteEEProm(adapter, tag, 2, buf);
if (stat)
return stat;
return 0;
}
static s16 osc_deviation(void *priv, s16 deviation, int flag)
{
struct ngene_channel *chan = priv;
struct i2c_adapter *adap = &chan->i2c_adapter;
u16 data = 0;
if (flag) {
data = (u16) deviation;
pr_info(DEVICE_NAME ": write deviation %d\n",
deviation);
eeprom_write_ushort(adap, 0x1000 + chan->number, data);
} else {
if (eeprom_read_ushort(adap, 0x1000 + chan->number, &data))
data = 0;
pr_info(DEVICE_NAME ": read deviation %d\n",
(s16) data);
}
return (s16) data;
}
/****************************************************************************/
/* Switch control (I2C gates, etc.) *****************************************/
/****************************************************************************/
static struct stv090x_config fe_cineS2 = {
.device = STV0900,
.demod_mode = STV090x_DUAL,
.clk_mode = STV090x_CLK_EXT,
.xtal = 27000000,
.address = 0x68,
.ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
.ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
.repeater_level = STV090x_RPTLEVEL_16,
.adc1_range = STV090x_ADC_1Vpp,
.adc2_range = STV090x_ADC_1Vpp,
.diseqc_envelope_mode = true,
.tuner_i2c_lock = cineS2_tuner_i2c_lock,
};
static struct stv090x_config fe_cineS2_2 = {
.device = STV0900,
.demod_mode = STV090x_DUAL,
.clk_mode = STV090x_CLK_EXT,
.xtal = 27000000,
.address = 0x69,
.ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
.ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
.repeater_level = STV090x_RPTLEVEL_16,
.adc1_range = STV090x_ADC_1Vpp,
.adc2_range = STV090x_ADC_1Vpp,
.diseqc_envelope_mode = true,
.tuner_i2c_lock = cineS2_tuner_i2c_lock,
};
static struct stv6110x_config tuner_cineS2_0 = {
.addr = 0x60,
.refclk = 27000000,
.clk_div = 1,
};
static struct stv6110x_config tuner_cineS2_1 = {
.addr = 0x63,
.refclk = 27000000,
.clk_div = 1,
};
static struct ngene_info ngene_info_cineS2 = {
.type = NGENE_SIDEWINDER,
.name = "Linux4Media cineS2 DVB-S2 Twin Tuner",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN},
.demod_attach = {demod_attach_stv0900, demod_attach_stv0900},
.tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110},
.fe_config = {&fe_cineS2, &fe_cineS2},
.tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1},
.lnb = {0x0b, 0x08},
.tsf = {3, 3},
.fw_version = 18,
.msi_supported = true,
};
static struct ngene_info ngene_info_satixS2 = {
.type = NGENE_SIDEWINDER,
.name = "Mystique SaTiX-S2 Dual",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN},
.demod_attach = {demod_attach_stv0900, demod_attach_stv0900},
.tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110},
.fe_config = {&fe_cineS2, &fe_cineS2},
.tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1},
.lnb = {0x0b, 0x08},
.tsf = {3, 3},
.fw_version = 18,
.msi_supported = true,
};
static struct ngene_info ngene_info_satixS2v2 = {
.type = NGENE_SIDEWINDER,
.name = "Mystique SaTiX-S2 Dual (v2)",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
NGENE_IO_TSOUT},
.demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe},
.tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_probe, tuner_attach_probe},
.fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
.tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
.lnb = {0x0a, 0x08, 0x0b, 0x09},
.tsf = {3, 3},
.fw_version = 18,
.msi_supported = true,
};
static struct ngene_info ngene_info_cineS2v5 = {
.type = NGENE_SIDEWINDER,
.name = "Linux4Media cineS2 DVB-S2 Twin Tuner (v5)",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
NGENE_IO_TSOUT},
.demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe},
.tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_probe, tuner_attach_probe},
.fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
.tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
.lnb = {0x0a, 0x08, 0x0b, 0x09},
.tsf = {3, 3},
.fw_version = 18,
.msi_supported = true,
};
static struct ngene_info ngene_info_duoFlex = {
.type = NGENE_SIDEWINDER,
.name = "Digital Devices DuoFlex PCIe or miniPCIe",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
NGENE_IO_TSOUT},
.demod_attach = {cineS2_probe, cineS2_probe, cineS2_probe, cineS2_probe},
.tuner_attach = {tuner_attach_probe, tuner_attach_probe, tuner_attach_probe, tuner_attach_probe},
.fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
.tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
.lnb = {0x0a, 0x08, 0x0b, 0x09},
.tsf = {3, 3},
.fw_version = 18,
.msi_supported = true,
};
static struct ngene_info ngene_info_m780 = {
.type = NGENE_APP,
.name = "Aver M780 ATSC/QAM-B",
/* Channel 0 is analog, which is currently unsupported */
.io_type = { NGENE_IO_NONE, NGENE_IO_TSIN },
.demod_attach = { NULL, demod_attach_lg330x },
/* Ensure these are NULL else the frame will call them (as funcs) */
.tuner_attach = { 0, 0, 0, 0 },
.fe_config = { NULL, &aver_m780 },
.avf = { 0 },
/* A custom electrical interface config for the demod to bridge */
.tsf = { 4, 4 },
.fw_version = 15,
};
static struct drxd_config fe_terratec_dvbt_0 = {
.index = 0,
.demod_address = 0x70,
.demod_revision = 0xa2,
.demoda_address = 0x00,
.pll_address = 0x60,
.pll_type = DVB_PLL_THOMSON_DTT7520X,
.clock = 20000,
.osc_deviation = osc_deviation,
};
static struct drxd_config fe_terratec_dvbt_1 = {
.index = 1,
.demod_address = 0x71,
.demod_revision = 0xa2,
.demoda_address = 0x00,
.pll_address = 0x60,
.pll_type = DVB_PLL_THOMSON_DTT7520X,
.clock = 20000,
.osc_deviation = osc_deviation,
};
static struct ngene_info ngene_info_terratec = {
.type = NGENE_TERRATEC,
.name = "Terratec Integra/Cinergy2400i Dual DVB-T",
.io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN},
.demod_attach = {demod_attach_drxd, demod_attach_drxd},
.fe_config = {&fe_terratec_dvbt_0, &fe_terratec_dvbt_1},
.i2c_access = 1,
};
/****************************************************************************/
/****************************************************************************/
/* PCI Subsystem ID *********************************************************/
/****************************************************************************/
#define NGENE_ID(_subvend, _subdev, _driverdata) { \
.vendor = NGENE_VID, .device = NGENE_PID, \
.subvendor = _subvend, .subdevice = _subdev, \
.driver_data = (unsigned long) &_driverdata }
/****************************************************************************/
static const struct pci_device_id ngene_id_tbl[] __devinitdata = {
NGENE_ID(0x18c3, 0xabc3, ngene_info_cineS2),
NGENE_ID(0x18c3, 0xabc4, ngene_info_cineS2),
NGENE_ID(0x18c3, 0xdb01, ngene_info_satixS2),
NGENE_ID(0x18c3, 0xdb02, ngene_info_satixS2v2),
NGENE_ID(0x18c3, 0xdd00, ngene_info_cineS2v5),
NGENE_ID(0x18c3, 0xdd10, ngene_info_duoFlex),
NGENE_ID(0x18c3, 0xdd20, ngene_info_duoFlex),
NGENE_ID(0x1461, 0x062e, ngene_info_m780),
NGENE_ID(0x153b, 0x1167, ngene_info_terratec),
{0}
};
MODULE_DEVICE_TABLE(pci, ngene_id_tbl);
/****************************************************************************/
/* Init/Exit ****************************************************************/
/****************************************************************************/
static pci_ers_result_t ngene_error_detected(struct pci_dev *dev,
enum pci_channel_state state)
{
printk(KERN_ERR DEVICE_NAME ": PCI error\n");
if (state == pci_channel_io_perm_failure)
return PCI_ERS_RESULT_DISCONNECT;
if (state == pci_channel_io_frozen)
return PCI_ERS_RESULT_NEED_RESET;
return PCI_ERS_RESULT_CAN_RECOVER;
}
static pci_ers_result_t ngene_link_reset(struct pci_dev *dev)
{
printk(KERN_INFO DEVICE_NAME ": link reset\n");
return 0;
}
static pci_ers_result_t ngene_slot_reset(struct pci_dev *dev)
{
printk(KERN_INFO DEVICE_NAME ": slot reset\n");
return 0;
}
static void ngene_resume(struct pci_dev *dev)
{
printk(KERN_INFO DEVICE_NAME ": resume\n");
}
static struct pci_error_handlers ngene_errors = {
.error_detected = ngene_error_detected,
.link_reset = ngene_link_reset,
.slot_reset = ngene_slot_reset,
.resume = ngene_resume,
};
static struct pci_driver ngene_pci_driver = {
.name = "ngene",
.id_table = ngene_id_tbl,
.probe = ngene_probe,
.remove = __devexit_p(ngene_remove),
.err_handler = &ngene_errors,
.shutdown = ngene_shutdown,
};
static __init int module_init_ngene(void)
{
printk(KERN_INFO
"nGene PCIE bridge driver, Copyright (C) 2005-2007 Micronas\n");
return pci_register_driver(&ngene_pci_driver);
}
static __exit void module_exit_ngene(void)
{
pci_unregister_driver(&ngene_pci_driver);
}
module_init(module_init_ngene);
module_exit(module_exit_ngene);
MODULE_DESCRIPTION("nGene");
MODULE_AUTHOR("Micronas, Ralph Metzler, Manfred Voelkel");
MODULE_LICENSE("GPL");

1707
drivers/media/pci/ngene/ngene-core.c Обычный файл

Разница между файлами не показана из-за своего большого размера Загрузить разницу

261
drivers/media/pci/ngene/ngene-dvb.c Обычный файл
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/*
* ngene-dvb.c: nGene PCIe bridge driver - DVB functions
*
* Copyright (C) 2005-2007 Micronas
*
* Copyright (C) 2008-2009 Ralph Metzler <rjkm@metzlerbros.de>
* Modifications for new nGene firmware,
* support for EEPROM-copying,
* support for new dual DVB-S2 card prototype
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 only, as published by the Free Software Foundation.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/poll.h>
#include <linux/io.h>
#include <asm/div64.h>
#include <linux/pci.h>
#include <linux/timer.h>
#include <linux/byteorder/generic.h>
#include <linux/firmware.h>
#include <linux/vmalloc.h>
#include "ngene.h"
/****************************************************************************/
/* COMMAND API interface ****************************************************/
/****************************************************************************/
static ssize_t ts_write(struct file *file, const char *buf,
size_t count, loff_t *ppos)
{
struct dvb_device *dvbdev = file->private_data;
struct ngene_channel *chan = dvbdev->priv;
struct ngene *dev = chan->dev;
if (wait_event_interruptible(dev->tsout_rbuf.queue,
dvb_ringbuffer_free
(&dev->tsout_rbuf) >= count) < 0)
return 0;
dvb_ringbuffer_write(&dev->tsout_rbuf, buf, count);
return count;
}
static ssize_t ts_read(struct file *file, char *buf,
size_t count, loff_t *ppos)
{
struct dvb_device *dvbdev = file->private_data;
struct ngene_channel *chan = dvbdev->priv;
struct ngene *dev = chan->dev;
int left, avail;
left = count;
while (left) {
if (wait_event_interruptible(
dev->tsin_rbuf.queue,
dvb_ringbuffer_avail(&dev->tsin_rbuf) > 0) < 0)
return -EAGAIN;
avail = dvb_ringbuffer_avail(&dev->tsin_rbuf);
if (avail > left)
avail = left;
dvb_ringbuffer_read_user(&dev->tsin_rbuf, buf, avail);
left -= avail;
buf += avail;
}
return count;
}
static const struct file_operations ci_fops = {
.owner = THIS_MODULE,
.read = ts_read,
.write = ts_write,
.open = dvb_generic_open,
.release = dvb_generic_release,
};
struct dvb_device ngene_dvbdev_ci = {
.priv = 0,
.readers = -1,
.writers = -1,
.users = -1,
.fops = &ci_fops,
};
/****************************************************************************/
/* DVB functions and API interface ******************************************/
/****************************************************************************/
static void swap_buffer(u32 *p, u32 len)
{
while (len) {
*p = swab32(*p);
p++;
len -= 4;
}
}
/* start of filler packet */
static u8 fill_ts[] = { 0x47, 0x1f, 0xff, 0x10, TS_FILLER };
/* #define DEBUG_CI_XFER */
#ifdef DEBUG_CI_XFER
static u32 ok;
static u32 overflow;
static u32 stripped;
#endif
void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)
{
struct ngene_channel *chan = priv;
struct ngene *dev = chan->dev;
if (flags & DF_SWAP32)
swap_buffer(buf, len);
if (dev->ci.en && chan->number == 2) {
while (len >= 188) {
if (memcmp(buf, fill_ts, sizeof fill_ts) != 0) {
if (dvb_ringbuffer_free(&dev->tsin_rbuf) >= 188) {
dvb_ringbuffer_write(&dev->tsin_rbuf, buf, 188);
wake_up(&dev->tsin_rbuf.queue);
#ifdef DEBUG_CI_XFER
ok++;
#endif
}
#ifdef DEBUG_CI_XFER
else
overflow++;
#endif
}
#ifdef DEBUG_CI_XFER
else
stripped++;
if (ok % 100 == 0 && overflow)
printk(KERN_WARNING "%s: ok %u overflow %u dropped %u\n", __func__, ok, overflow, stripped);
#endif
buf += 188;
len -= 188;
}
return NULL;
}
if (chan->users > 0)
dvb_dmx_swfilter(&chan->demux, buf, len);
return NULL;
}
void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)
{
struct ngene_channel *chan = priv;
struct ngene *dev = chan->dev;
u32 alen;
alen = dvb_ringbuffer_avail(&dev->tsout_rbuf);
alen -= alen % 188;
if (alen < len)
FillTSBuffer(buf + alen, len - alen, flags);
else
alen = len;
dvb_ringbuffer_read(&dev->tsout_rbuf, buf, alen);
if (flags & DF_SWAP32)
swap_buffer((u32 *)buf, alen);
wake_up_interruptible(&dev->tsout_rbuf.queue);
return buf;
}
int ngene_start_feed(struct dvb_demux_feed *dvbdmxfeed)
{
struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
struct ngene_channel *chan = dvbdmx->priv;
if (chan->users == 0) {
if (!chan->dev->cmd_timeout_workaround || !chan->running)
set_transfer(chan, 1);
}
return ++chan->users;
}
int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
{
struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
struct ngene_channel *chan = dvbdmx->priv;
if (--chan->users)
return chan->users;
if (!chan->dev->cmd_timeout_workaround)
set_transfer(chan, 0);
return 0;
}
int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
int (*start_feed)(struct dvb_demux_feed *),
int (*stop_feed)(struct dvb_demux_feed *),
void *priv)
{
dvbdemux->priv = priv;
dvbdemux->filternum = 256;
dvbdemux->feednum = 256;
dvbdemux->start_feed = start_feed;
dvbdemux->stop_feed = stop_feed;
dvbdemux->write_to_decoder = NULL;
dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
DMX_SECTION_FILTERING |
DMX_MEMORY_BASED_FILTERING);
return dvb_dmx_init(dvbdemux);
}
int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
struct dvb_demux *dvbdemux,
struct dmx_frontend *hw_frontend,
struct dmx_frontend *mem_frontend,
struct dvb_adapter *dvb_adapter)
{
int ret;
dmxdev->filternum = 256;
dmxdev->demux = &dvbdemux->dmx;
dmxdev->capabilities = 0;
ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
if (ret < 0)
return ret;
hw_frontend->source = DMX_FRONTEND_0;
dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
mem_frontend->source = DMX_MEMORY_FE;
dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
}

176
drivers/media/pci/ngene/ngene-i2c.c Обычный файл
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/*
* ngene-i2c.c: nGene PCIe bridge driver i2c functions
*
* Copyright (C) 2005-2007 Micronas
*
* Copyright (C) 2008-2009 Ralph Metzler <rjkm@metzlerbros.de>
* Modifications for new nGene firmware,
* support for EEPROM-copying,
* support for new dual DVB-S2 card prototype
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 only, as published by the Free Software Foundation.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
*/
/* FIXME - some of these can probably be removed */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/poll.h>
#include <linux/io.h>
#include <asm/div64.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/timer.h>
#include <linux/byteorder/generic.h>
#include <linux/firmware.h>
#include <linux/vmalloc.h>
#include "ngene.h"
/* Firmware command for i2c operations */
static int ngene_command_i2c_read(struct ngene *dev, u8 adr,
u8 *out, u8 outlen, u8 *in, u8 inlen, int flag)
{
struct ngene_command com;
com.cmd.hdr.Opcode = CMD_I2C_READ;
com.cmd.hdr.Length = outlen + 3;
com.cmd.I2CRead.Device = adr << 1;
memcpy(com.cmd.I2CRead.Data, out, outlen);
com.cmd.I2CRead.Data[outlen] = inlen;
com.cmd.I2CRead.Data[outlen + 1] = 0;
com.in_len = outlen + 3;
com.out_len = inlen + 1;
if (ngene_command(dev, &com) < 0)
return -EIO;
if ((com.cmd.raw8[0] >> 1) != adr)
return -EIO;
if (flag)
memcpy(in, com.cmd.raw8, inlen + 1);
else
memcpy(in, com.cmd.raw8 + 1, inlen);
return 0;
}
static int ngene_command_i2c_write(struct ngene *dev, u8 adr,
u8 *out, u8 outlen)
{
struct ngene_command com;
com.cmd.hdr.Opcode = CMD_I2C_WRITE;
com.cmd.hdr.Length = outlen + 1;
com.cmd.I2CRead.Device = adr << 1;
memcpy(com.cmd.I2CRead.Data, out, outlen);
com.in_len = outlen + 1;
com.out_len = 1;
if (ngene_command(dev, &com) < 0)
return -EIO;
if (com.cmd.raw8[0] == 1)
return -EIO;
return 0;
}
static void ngene_i2c_set_bus(struct ngene *dev, int bus)
{
if (!(dev->card_info->i2c_access & 2))
return;
if (dev->i2c_current_bus == bus)
return;
switch (bus) {
case 0:
ngene_command_gpio_set(dev, 3, 0);
ngene_command_gpio_set(dev, 2, 1);
break;
case 1:
ngene_command_gpio_set(dev, 2, 0);
ngene_command_gpio_set(dev, 3, 1);
break;
}
dev->i2c_current_bus = bus;
}
static int ngene_i2c_master_xfer(struct i2c_adapter *adapter,
struct i2c_msg msg[], int num)
{
struct ngene_channel *chan =
(struct ngene_channel *)i2c_get_adapdata(adapter);
struct ngene *dev = chan->dev;
down(&dev->i2c_switch_mutex);
ngene_i2c_set_bus(dev, chan->number);
if (num == 2 && msg[1].flags & I2C_M_RD && !(msg[0].flags & I2C_M_RD))
if (!ngene_command_i2c_read(dev, msg[0].addr,
msg[0].buf, msg[0].len,
msg[1].buf, msg[1].len, 0))
goto done;
if (num == 1 && !(msg[0].flags & I2C_M_RD))
if (!ngene_command_i2c_write(dev, msg[0].addr,
msg[0].buf, msg[0].len))
goto done;
if (num == 1 && (msg[0].flags & I2C_M_RD))
if (!ngene_command_i2c_read(dev, msg[0].addr, NULL, 0,
msg[0].buf, msg[0].len, 0))
goto done;
up(&dev->i2c_switch_mutex);
return -EIO;
done:
up(&dev->i2c_switch_mutex);
return num;
}
static u32 ngene_i2c_functionality(struct i2c_adapter *adap)
{
return I2C_FUNC_SMBUS_EMUL;
}
static struct i2c_algorithm ngene_i2c_algo = {
.master_xfer = ngene_i2c_master_xfer,
.functionality = ngene_i2c_functionality,
};
int ngene_i2c_init(struct ngene *dev, int dev_nr)
{
struct i2c_adapter *adap = &(dev->channel[dev_nr].i2c_adapter);
i2c_set_adapdata(adap, &(dev->channel[dev_nr]));
strcpy(adap->name, "nGene");
adap->algo = &ngene_i2c_algo;
adap->algo_data = (void *)&(dev->channel[dev_nr]);
adap->dev.parent = &dev->pci_dev->dev;
return i2c_add_adapter(adap);
}

921
drivers/media/pci/ngene/ngene.h Обычный файл
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@@ -0,0 +1,921 @@
/*
* ngene.h: nGene PCIe bridge driver
*
* Copyright (C) 2005-2007 Micronas
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 only, as published by the Free Software Foundation.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
*/
#ifndef _NGENE_H_
#define _NGENE_H_
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <asm/dma.h>
#include <linux/scatterlist.h>
#include <linux/dvb/frontend.h>
#include "dmxdev.h"
#include "dvbdev.h"
#include "dvb_demux.h"
#include "dvb_ca_en50221.h"
#include "dvb_frontend.h"
#include "dvb_ringbuffer.h"
#include "dvb_net.h"
#include "cxd2099.h"
#define DEVICE_NAME "ngene"
#define NGENE_VID 0x18c3
#define NGENE_PID 0x0720
#ifndef VIDEO_CAP_VC1
#define VIDEO_CAP_AVC 128
#define VIDEO_CAP_H264 128
#define VIDEO_CAP_VC1 256
#define VIDEO_CAP_WMV9 256
#define VIDEO_CAP_MPEG4 512
#endif
enum STREAM {
STREAM_VIDEOIN1 = 0, /* ITU656 or TS Input */
STREAM_VIDEOIN2,
STREAM_AUDIOIN1, /* I2S or SPI Input */
STREAM_AUDIOIN2,
STREAM_AUDIOOUT,
MAX_STREAM
};
enum SMODE_BITS {
SMODE_AUDIO_SPDIF = 0x20,
SMODE_AVSYNC = 0x10,
SMODE_TRANSPORT_STREAM = 0x08,
SMODE_AUDIO_CAPTURE = 0x04,
SMODE_VBI_CAPTURE = 0x02,
SMODE_VIDEO_CAPTURE = 0x01
};
enum STREAM_FLAG_BITS {
SFLAG_CHROMA_FORMAT_2COMP = 0x01, /* Chroma Format : 2's complement */
SFLAG_CHROMA_FORMAT_OFFSET = 0x00, /* Chroma Format : Binary offset */
SFLAG_ORDER_LUMA_CHROMA = 0x02, /* Byte order: Y,Cb,Y,Cr */
SFLAG_ORDER_CHROMA_LUMA = 0x00, /* Byte order: Cb,Y,Cr,Y */
SFLAG_COLORBAR = 0x04, /* Select colorbar */
};
#define PROGRAM_ROM 0x0000
#define PROGRAM_SRAM 0x1000
#define PERIPHERALS0 0x8000
#define PERIPHERALS1 0x9000
#define SHARED_BUFFER 0xC000
#define HOST_TO_NGENE (SHARED_BUFFER+0x0000)
#define NGENE_TO_HOST (SHARED_BUFFER+0x0100)
#define NGENE_COMMAND (SHARED_BUFFER+0x0200)
#define NGENE_COMMAND_HI (SHARED_BUFFER+0x0204)
#define NGENE_STATUS (SHARED_BUFFER+0x0208)
#define NGENE_STATUS_HI (SHARED_BUFFER+0x020C)
#define NGENE_EVENT (SHARED_BUFFER+0x0210)
#define NGENE_EVENT_HI (SHARED_BUFFER+0x0214)
#define VARIABLES (SHARED_BUFFER+0x0210)
#define NGENE_INT_COUNTS (SHARED_BUFFER+0x0260)
#define NGENE_INT_ENABLE (SHARED_BUFFER+0x0264)
#define NGENE_VBI_LINE_COUNT (SHARED_BUFFER+0x0268)
#define BUFFER_GP_XMIT (SHARED_BUFFER+0x0800)
#define BUFFER_GP_RECV (SHARED_BUFFER+0x0900)
#define EEPROM_AREA (SHARED_BUFFER+0x0A00)
#define SG_V_IN_1 (SHARED_BUFFER+0x0A80)
#define SG_VBI_1 (SHARED_BUFFER+0x0B00)
#define SG_A_IN_1 (SHARED_BUFFER+0x0B80)
#define SG_V_IN_2 (SHARED_BUFFER+0x0C00)
#define SG_VBI_2 (SHARED_BUFFER+0x0C80)
#define SG_A_IN_2 (SHARED_BUFFER+0x0D00)
#define SG_V_OUT (SHARED_BUFFER+0x0D80)
#define SG_A_OUT2 (SHARED_BUFFER+0x0E00)
#define DATA_A_IN_1 (SHARED_BUFFER+0x0E80)
#define DATA_A_IN_2 (SHARED_BUFFER+0x0F00)
#define DATA_A_OUT (SHARED_BUFFER+0x0F80)
#define DATA_V_IN_1 (SHARED_BUFFER+0x1000)
#define DATA_V_IN_2 (SHARED_BUFFER+0x2000)
#define DATA_V_OUT (SHARED_BUFFER+0x3000)
#define DATA_FIFO_AREA (SHARED_BUFFER+0x1000)
#define TIMESTAMPS 0xA000
#define SCRATCHPAD 0xA080
#define FORCE_INT 0xA088
#define FORCE_NMI 0xA090
#define INT_STATUS 0xA0A0
#define DEV_VER 0x9004
#define FW_DEBUG_DEFAULT (PROGRAM_SRAM+0x00FF)
struct SG_ADDR {
u64 start;
u64 curr;
u16 curr_ptr;
u16 elements;
u32 pad[3];
} __attribute__ ((__packed__));
struct SHARED_MEMORY {
/* C000 */
u32 HostToNgene[64];
/* C100 */
u32 NgeneToHost[64];
/* C200 */
u64 NgeneCommand;
u64 NgeneStatus;
u64 NgeneEvent;
/* C210 */
u8 pad1[0xc260 - 0xc218];
/* C260 */
u32 IntCounts;
u32 IntEnable;
/* C268 */
u8 pad2[0xd000 - 0xc268];
} __attribute__ ((__packed__));
struct BUFFER_STREAM_RESULTS {
u32 Clock; /* Stream time in 100ns units */
u16 RemainingLines; /* Remaining lines in this field.
0 for complete field */
u8 FieldCount; /* Video field number */
u8 Flags; /* Bit 7 = Done, Bit 6 = seen, Bit 5 = overflow,
Bit 0 = FieldID */
u16 BlockCount; /* Audio block count (unused) */
u8 Reserved[2];
u32 DTOUpdate;
} __attribute__ ((__packed__));
struct HW_SCATTER_GATHER_ELEMENT {
u64 Address;
u32 Length;
u32 Reserved;
} __attribute__ ((__packed__));
struct BUFFER_HEADER {
u64 Next;
struct BUFFER_STREAM_RESULTS SR;
u32 Number_of_entries_1;
u32 Reserved5;
u64 Address_of_first_entry_1;
u32 Number_of_entries_2;
u32 Reserved7;
u64 Address_of_first_entry_2;
} __attribute__ ((__packed__));
struct EVENT_BUFFER {
u32 TimeStamp;
u8 GPIOStatus;
u8 UARTStatus;
u8 RXCharacter;
u8 EventStatus;
u32 Reserved[2];
} __attribute__ ((__packed__));
/* Firmware commands. */
enum OPCODES {
CMD_NOP = 0,
CMD_FWLOAD_PREPARE = 0x01,
CMD_FWLOAD_FINISH = 0x02,
CMD_I2C_READ = 0x03,
CMD_I2C_WRITE = 0x04,
CMD_I2C_WRITE_NOSTOP = 0x05,
CMD_I2C_CONTINUE_WRITE = 0x06,
CMD_I2C_CONTINUE_WRITE_NOSTOP = 0x07,
CMD_DEBUG_OUTPUT = 0x09,
CMD_CONTROL = 0x10,
CMD_CONFIGURE_BUFFER = 0x11,
CMD_CONFIGURE_FREE_BUFFER = 0x12,
CMD_SPI_READ = 0x13,
CMD_SPI_WRITE = 0x14,
CMD_MEM_READ = 0x20,
CMD_MEM_WRITE = 0x21,
CMD_SFR_READ = 0x22,
CMD_SFR_WRITE = 0x23,
CMD_IRAM_READ = 0x24,
CMD_IRAM_WRITE = 0x25,
CMD_SET_GPIO_PIN = 0x26,
CMD_SET_GPIO_INT = 0x27,
CMD_CONFIGURE_UART = 0x28,
CMD_WRITE_UART = 0x29,
MAX_CMD
};
enum RESPONSES {
OK = 0,
ERROR = 1
};
struct FW_HEADER {
u8 Opcode;
u8 Length;
} __attribute__ ((__packed__));
struct FW_I2C_WRITE {
struct FW_HEADER hdr;
u8 Device;
u8 Data[250];
} __attribute__ ((__packed__));
struct FW_I2C_CONTINUE_WRITE {
struct FW_HEADER hdr;
u8 Data[250];
} __attribute__ ((__packed__));
struct FW_I2C_READ {
struct FW_HEADER hdr;
u8 Device;
u8 Data[252]; /* followed by two bytes of read data count */
} __attribute__ ((__packed__));
struct FW_SPI_WRITE {
struct FW_HEADER hdr;
u8 ModeSelect;
u8 Data[250];
} __attribute__ ((__packed__));
struct FW_SPI_READ {
struct FW_HEADER hdr;
u8 ModeSelect;
u8 Data[252]; /* followed by two bytes of read data count */
} __attribute__ ((__packed__));
struct FW_FWLOAD_PREPARE {
struct FW_HEADER hdr;
} __attribute__ ((__packed__));
struct FW_FWLOAD_FINISH {
struct FW_HEADER hdr;
u16 Address; /* address of final block */
u16 Length;
} __attribute__ ((__packed__));
/*
* Meaning of FW_STREAM_CONTROL::Mode bits:
* Bit 7: Loopback PEXin to PEXout using TVOut channel
* Bit 6: AVLOOP
* Bit 5: Audio select; 0=I2S, 1=SPDIF
* Bit 4: AVSYNC
* Bit 3: Enable transport stream
* Bit 2: Enable audio capture
* Bit 1: Enable ITU-Video VBI capture
* Bit 0: Enable ITU-Video capture
*
* Meaning of FW_STREAM_CONTROL::Control bits (see UVI1_CTL)
* Bit 7: continuous capture
* Bit 6: capture one field
* Bit 5: capture one frame
* Bit 4: unused
* Bit 3: starting field; 0=odd, 1=even
* Bit 2: sample size; 0=8-bit, 1=10-bit
* Bit 1: data format; 0=UYVY, 1=YUY2
* Bit 0: resets buffer pointers
*/
enum FSC_MODE_BITS {
SMODE_LOOPBACK = 0x80,
SMODE_AVLOOP = 0x40,
_SMODE_AUDIO_SPDIF = 0x20,
_SMODE_AVSYNC = 0x10,
_SMODE_TRANSPORT_STREAM = 0x08,
_SMODE_AUDIO_CAPTURE = 0x04,
_SMODE_VBI_CAPTURE = 0x02,
_SMODE_VIDEO_CAPTURE = 0x01
};
/* Meaning of FW_STREAM_CONTROL::Stream bits:
* Bit 3: Audio sample count: 0 = relative, 1 = absolute
* Bit 2: color bar select; 1=color bars, 0=CV3 decoder
* Bits 1-0: stream select, UVI1, UVI2, TVOUT
*/
struct FW_STREAM_CONTROL {
struct FW_HEADER hdr;
u8 Stream; /* Stream number (UVI1, UVI2, TVOUT) */
u8 Control; /* Value written to UVI1_CTL */
u8 Mode; /* Controls clock source */
u8 SetupDataLen; /* Length of setup data, MSB=1 write
backwards */
u16 CaptureBlockCount; /* Blocks (a 256 Bytes) to capture per buffer
for TS and Audio */
u64 Buffer_Address; /* Address of first buffer header */
u16 BytesPerVideoLine;
u16 MaxLinesPerField;
u16 MinLinesPerField;
u16 Reserved_1;
u16 BytesPerVBILine;
u16 MaxVBILinesPerField;
u16 MinVBILinesPerField;
u16 SetupDataAddr; /* ngene relative address of setup data */
u8 SetupData[32]; /* setup data */
} __attribute__((__packed__));
#define AUDIO_BLOCK_SIZE 256
#define TS_BLOCK_SIZE 256
struct FW_MEM_READ {
struct FW_HEADER hdr;
u16 address;
} __attribute__ ((__packed__));
struct FW_MEM_WRITE {
struct FW_HEADER hdr;
u16 address;
u8 data;
} __attribute__ ((__packed__));
struct FW_SFR_IRAM_READ {
struct FW_HEADER hdr;
u8 address;
} __attribute__ ((__packed__));
struct FW_SFR_IRAM_WRITE {
struct FW_HEADER hdr;
u8 address;
u8 data;
} __attribute__ ((__packed__));
struct FW_SET_GPIO_PIN {
struct FW_HEADER hdr;
u8 select;
} __attribute__ ((__packed__));
struct FW_SET_GPIO_INT {
struct FW_HEADER hdr;
u8 select;
} __attribute__ ((__packed__));
struct FW_SET_DEBUGMODE {
struct FW_HEADER hdr;
u8 debug_flags;
} __attribute__ ((__packed__));
struct FW_CONFIGURE_BUFFERS {
struct FW_HEADER hdr;
u8 config;
} __attribute__ ((__packed__));
enum _BUFFER_CONFIGS {
/* 4k UVI1, 4k UVI2, 2k AUD1, 2k AUD2 (standard usage) */
BUFFER_CONFIG_4422 = 0,
/* 3k UVI1, 3k UVI2, 3k AUD1, 3k AUD2 (4x TS input usage) */
BUFFER_CONFIG_3333 = 1,
/* 8k UVI1, 0k UVI2, 2k AUD1, 2k I2SOut (HDTV decoder usage) */
BUFFER_CONFIG_8022 = 2,
BUFFER_CONFIG_FW17 = 255, /* Use new FW 17 command */
};
struct FW_CONFIGURE_FREE_BUFFERS {
struct FW_HEADER hdr;
u8 UVI1_BufferLength;
u8 UVI2_BufferLength;
u8 TVO_BufferLength;
u8 AUD1_BufferLength;
u8 AUD2_BufferLength;
u8 TVA_BufferLength;
} __attribute__ ((__packed__));
struct FW_CONFIGURE_UART {
struct FW_HEADER hdr;
u8 UartControl;
} __attribute__ ((__packed__));
enum _UART_CONFIG {
_UART_BAUDRATE_19200 = 0,
_UART_BAUDRATE_9600 = 1,
_UART_BAUDRATE_4800 = 2,
_UART_BAUDRATE_2400 = 3,
_UART_RX_ENABLE = 0x40,
_UART_TX_ENABLE = 0x80,
};
struct FW_WRITE_UART {
struct FW_HEADER hdr;
u8 Data[252];
} __attribute__ ((__packed__));
struct ngene_command {
u32 in_len;
u32 out_len;
union {
u32 raw[64];
u8 raw8[256];
struct FW_HEADER hdr;
struct FW_I2C_WRITE I2CWrite;
struct FW_I2C_CONTINUE_WRITE I2CContinueWrite;
struct FW_I2C_READ I2CRead;
struct FW_STREAM_CONTROL StreamControl;
struct FW_FWLOAD_PREPARE FWLoadPrepare;
struct FW_FWLOAD_FINISH FWLoadFinish;
struct FW_MEM_READ MemoryRead;
struct FW_MEM_WRITE MemoryWrite;
struct FW_SFR_IRAM_READ SfrIramRead;
struct FW_SFR_IRAM_WRITE SfrIramWrite;
struct FW_SPI_WRITE SPIWrite;
struct FW_SPI_READ SPIRead;
struct FW_SET_GPIO_PIN SetGpioPin;
struct FW_SET_GPIO_INT SetGpioInt;
struct FW_SET_DEBUGMODE SetDebugMode;
struct FW_CONFIGURE_BUFFERS ConfigureBuffers;
struct FW_CONFIGURE_FREE_BUFFERS ConfigureFreeBuffers;
struct FW_CONFIGURE_UART ConfigureUart;
struct FW_WRITE_UART WriteUart;
} cmd;
} __attribute__ ((__packed__));
#define NGENE_INTERFACE_VERSION 0x103
#define MAX_VIDEO_BUFFER_SIZE (417792) /* 288*1440 rounded up to next page */
#define MAX_AUDIO_BUFFER_SIZE (8192) /* Gives room for about 23msec@48KHz */
#define MAX_VBI_BUFFER_SIZE (28672) /* 1144*18 rounded up to next page */
#define MAX_TS_BUFFER_SIZE (98304) /* 512*188 rounded up to next page */
#define MAX_HDTV_BUFFER_SIZE (2080768) /* 541*1920*2 rounded up to next page
Max: (1920x1080i60) */
#define OVERFLOW_BUFFER_SIZE (8192)
#define RING_SIZE_VIDEO 4
#define RING_SIZE_AUDIO 8
#define RING_SIZE_TS 8
#define NUM_SCATTER_GATHER_ENTRIES 8
#define MAX_DMA_LENGTH (((MAX_VIDEO_BUFFER_SIZE + MAX_VBI_BUFFER_SIZE) * \
RING_SIZE_VIDEO * 2) + \
(MAX_AUDIO_BUFFER_SIZE * RING_SIZE_AUDIO * 2) + \
(MAX_TS_BUFFER_SIZE * RING_SIZE_TS * 4) + \
(RING_SIZE_VIDEO * PAGE_SIZE * 2) + \
(RING_SIZE_AUDIO * PAGE_SIZE * 2) + \
(RING_SIZE_TS * PAGE_SIZE * 4) + \
8 * PAGE_SIZE + OVERFLOW_BUFFER_SIZE + PAGE_SIZE)
#define EVENT_QUEUE_SIZE 16
/* Gathers the current state of a single channel. */
struct SBufferHeader {
struct BUFFER_HEADER ngeneBuffer; /* Physical descriptor */
struct SBufferHeader *Next;
void *Buffer1;
struct HW_SCATTER_GATHER_ELEMENT *scList1;
void *Buffer2;
struct HW_SCATTER_GATHER_ELEMENT *scList2;
};
/* Sizeof SBufferHeader aligned to next 64 Bit boundary (hw restriction) */
#define SIZEOF_SBufferHeader ((sizeof(struct SBufferHeader) + 63) & ~63)
enum HWSTATE {
HWSTATE_STOP,
HWSTATE_STARTUP,
HWSTATE_RUN,
HWSTATE_PAUSE,
};
enum KSSTATE {
KSSTATE_STOP,
KSSTATE_ACQUIRE,
KSSTATE_PAUSE,
KSSTATE_RUN,
};
struct SRingBufferDescriptor {
struct SBufferHeader *Head; /* Points to first buffer in ring buffer
structure*/
u64 PAHead; /* Physical address of first buffer */
u32 MemSize; /* Memory size of allocated ring buffers
(needed for freeing) */
u32 NumBuffers; /* Number of buffers in the ring */
u32 Buffer1Length; /* Allocated length of Buffer 1 */
u32 Buffer2Length; /* Allocated length of Buffer 2 */
void *SCListMem; /* Memory to hold scatter gather lists for this
ring */
u64 PASCListMem; /* Physical address .. */
u32 SCListMemSize; /* Size of this memory */
};
enum STREAMMODEFLAGS {
StreamMode_NONE = 0, /* Stream not used */
StreamMode_ANALOG = 1, /* Analog: Stream 0,1 = Video, 2,3 = Audio */
StreamMode_TSIN = 2, /* Transport stream input (all) */
StreamMode_HDTV = 4, /* HDTV: Maximum 1920x1080p30,1920x1080i60
(only stream 0) */
StreamMode_TSOUT = 8, /* Transport stream output (only stream 3) */
};
enum BufferExchangeFlags {
BEF_EVEN_FIELD = 0x00000001,
BEF_CONTINUATION = 0x00000002,
BEF_MORE_DATA = 0x00000004,
BEF_OVERFLOW = 0x00000008,
DF_SWAP32 = 0x00010000,
};
typedef void *(IBufferExchange)(void *, void *, u32, u32, u32);
struct MICI_STREAMINFO {
IBufferExchange *pExchange;
IBufferExchange *pExchangeVBI; /* Secondary (VBI, ancillary) */
u8 Stream;
u8 Flags;
u8 Mode;
u8 Reserved;
u16 nLinesVideo;
u16 nBytesPerLineVideo;
u16 nLinesVBI;
u16 nBytesPerLineVBI;
u32 CaptureLength; /* Used for audio and transport stream */
};
/****************************************************************************/
/* STRUCTS ******************************************************************/
/****************************************************************************/
/* sound hardware definition */
#define MIXER_ADDR_TVTUNER 0
#define MIXER_ADDR_LAST 0
struct ngene_channel;
/*struct sound chip*/
struct mychip {
struct ngene_channel *chan;
struct snd_card *card;
struct pci_dev *pci;
struct snd_pcm_substream *substream;
struct snd_pcm *pcm;
unsigned long port;
int irq;
spinlock_t mixer_lock;
spinlock_t lock;
int mixer_volume[MIXER_ADDR_LAST + 1][2];
int capture_source[MIXER_ADDR_LAST + 1][2];
};
#ifdef NGENE_V4L
struct ngene_overlay {
int tvnorm;
struct v4l2_rect w;
enum v4l2_field field;
struct v4l2_clip *clips;
int nclips;
int setup_ok;
};
struct ngene_tvnorm {
int v4l2_id;
char *name;
u16 swidth, sheight; /* scaled standard width, height */
int tuner_norm;
int soundstd;
};
struct ngene_vopen {
struct ngene_channel *ch;
enum v4l2_priority prio;
int width;
int height;
int depth;
struct videobuf_queue vbuf_q;
struct videobuf_queue vbi;
int fourcc;
int picxcount;
int resources;
enum v4l2_buf_type type;
const struct ngene_format *fmt;
const struct ngene_format *ovfmt;
struct ngene_overlay ov;
};
#endif
struct ngene_channel {
struct device device;
struct i2c_adapter i2c_adapter;
struct ngene *dev;
int number;
int type;
int mode;
bool has_adapter;
bool has_demux;
int demod_type;
int (*gate_ctrl)(struct dvb_frontend *, int);
struct dvb_frontend *fe;
struct dvb_frontend *fe2;
struct dmxdev dmxdev;
struct dvb_demux demux;
struct dvb_net dvbnet;
struct dmx_frontend hw_frontend;
struct dmx_frontend mem_frontend;
int users;
struct video_device *v4l_dev;
struct dvb_device *ci_dev;
struct tasklet_struct demux_tasklet;
struct SBufferHeader *nextBuffer;
enum KSSTATE State;
enum HWSTATE HWState;
u8 Stream;
u8 Flags;
u8 Mode;
IBufferExchange *pBufferExchange;
IBufferExchange *pBufferExchange2;
spinlock_t state_lock;
u16 nLines;
u16 nBytesPerLine;
u16 nVBILines;
u16 nBytesPerVBILine;
u16 itumode;
u32 Capture1Length;
u32 Capture2Length;
struct SRingBufferDescriptor RingBuffer;
struct SRingBufferDescriptor TSRingBuffer;
struct SRingBufferDescriptor TSIdleBuffer;
u32 DataFormatFlags;
int AudioDTOUpdated;
u32 AudioDTOValue;
int (*set_tone)(struct dvb_frontend *, fe_sec_tone_mode_t);
u8 lnbh;
/* stuff from analog driver */
int minor;
struct mychip *mychip;
struct snd_card *soundcard;
u8 *evenbuffer;
u8 dma_on;
int soundstreamon;
int audiomute;
int soundbuffisallocated;
int sndbuffflag;
int tun_rdy;
int dec_rdy;
int tun_dec_rdy;
int lastbufferflag;
struct ngene_tvnorm *tvnorms;
int tvnorm_num;
int tvnorm;
#ifdef NGENE_V4L
int videousers;
struct v4l2_prio_state prio;
struct ngene_vopen init;
int resources;
struct v4l2_framebuffer fbuf;
struct ngene_buffer *screen; /* overlay */
struct list_head capture; /* video capture queue */
spinlock_t s_lock;
struct semaphore reslock;
#endif
int running;
};
struct ngene_ci {
struct device device;
struct i2c_adapter i2c_adapter;
struct ngene *dev;
struct dvb_ca_en50221 *en;
};
struct ngene;
typedef void (rx_cb_t)(struct ngene *, u32, u8);
typedef void (tx_cb_t)(struct ngene *, u32);
struct ngene {
int nr;
struct pci_dev *pci_dev;
unsigned char *iomem;
/*struct i2c_adapter i2c_adapter;*/
u32 device_version;
u32 fw_interface_version;
u32 icounts;
bool msi_enabled;
bool cmd_timeout_workaround;
u8 *CmdDoneByte;
int BootFirmware;
void *OverflowBuffer;
dma_addr_t PAOverflowBuffer;
void *FWInterfaceBuffer;
dma_addr_t PAFWInterfaceBuffer;
u8 *ngenetohost;
u8 *hosttongene;
struct EVENT_BUFFER EventQueue[EVENT_QUEUE_SIZE];
int EventQueueOverflowCount;
int EventQueueOverflowFlag;
struct tasklet_struct event_tasklet;
struct EVENT_BUFFER *EventBuffer;
int EventQueueWriteIndex;
int EventQueueReadIndex;
wait_queue_head_t cmd_wq;
int cmd_done;
struct semaphore cmd_mutex;
struct semaphore stream_mutex;
struct semaphore pll_mutex;
struct semaphore i2c_switch_mutex;
int i2c_current_channel;
int i2c_current_bus;
spinlock_t cmd_lock;
struct dvb_adapter adapter[MAX_STREAM];
struct dvb_adapter *first_adapter; /* "one_adapter" modprobe opt */
struct ngene_channel channel[MAX_STREAM];
struct ngene_info *card_info;
tx_cb_t *TxEventNotify;
rx_cb_t *RxEventNotify;
int tx_busy;
wait_queue_head_t tx_wq;
wait_queue_head_t rx_wq;
#define UART_RBUF_LEN 4096
u8 uart_rbuf[UART_RBUF_LEN];
int uart_rp, uart_wp;
#define TS_FILLER 0x6f
u8 *tsout_buf;
#define TSOUT_BUF_SIZE (512*188*8)
struct dvb_ringbuffer tsout_rbuf;
u8 *tsin_buf;
#define TSIN_BUF_SIZE (512*188*8)
struct dvb_ringbuffer tsin_rbuf;
u8 *ain_buf;
#define AIN_BUF_SIZE (128*1024)
struct dvb_ringbuffer ain_rbuf;
u8 *vin_buf;
#define VIN_BUF_SIZE (4*1920*1080)
struct dvb_ringbuffer vin_rbuf;
unsigned long exp_val;
int prev_cmd;
struct ngene_ci ci;
};
struct ngene_info {
int type;
#define NGENE_APP 0
#define NGENE_TERRATEC 1
#define NGENE_SIDEWINDER 2
#define NGENE_RACER 3
#define NGENE_VIPER 4
#define NGENE_PYTHON 5
#define NGENE_VBOX_V1 6
#define NGENE_VBOX_V2 7
int fw_version;
bool msi_supported;
char *name;
int io_type[MAX_STREAM];
#define NGENE_IO_NONE 0
#define NGENE_IO_TV 1
#define NGENE_IO_HDTV 2
#define NGENE_IO_TSIN 4
#define NGENE_IO_TSOUT 8
#define NGENE_IO_AIN 16
void *fe_config[4];
void *tuner_config[4];
int (*demod_attach[4])(struct ngene_channel *);
int (*tuner_attach[4])(struct ngene_channel *);
u8 avf[4];
u8 msp[4];
u8 demoda[4];
u8 lnb[4];
int i2c_access;
u8 ntsc;
u8 tsf[4];
u8 i2s[4];
int (*gate_ctrl)(struct dvb_frontend *, int);
int (*switch_ctrl)(struct ngene_channel *, int, int);
};
#ifdef NGENE_V4L
struct ngene_format {
char *name;
int fourcc; /* video4linux 2 */
int btformat; /* BT848_COLOR_FMT_* */
int format;
int btswap; /* BT848_COLOR_CTL_* */
int depth; /* bit/pixel */
int flags;
int hshift, vshift; /* for planar modes */
int palette;
};
#define RESOURCE_OVERLAY 1
#define RESOURCE_VIDEO 2
#define RESOURCE_VBI 4
struct ngene_buffer {
/* common v4l buffer stuff -- must be first */
struct videobuf_buffer vb;
/* ngene specific */
const struct ngene_format *fmt;
int tvnorm;
int btformat;
int btswap;
};
#endif
/* Provided by ngene-core.c */
int __devinit ngene_probe(struct pci_dev *pci_dev,
const struct pci_device_id *id);
void __devexit ngene_remove(struct pci_dev *pdev);
void ngene_shutdown(struct pci_dev *pdev);
int ngene_command(struct ngene *dev, struct ngene_command *com);
int ngene_command_gpio_set(struct ngene *dev, u8 select, u8 level);
void set_transfer(struct ngene_channel *chan, int state);
void FillTSBuffer(void *Buffer, int Length, u32 Flags);
/* Provided by ngene-i2c.c */
int ngene_i2c_init(struct ngene *dev, int dev_nr);
/* Provided by ngene-dvb.c */
extern struct dvb_device ngene_dvbdev_ci;
void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);
void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);
int ngene_start_feed(struct dvb_demux_feed *dvbdmxfeed);
int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed);
int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
int (*start_feed)(struct dvb_demux_feed *),
int (*stop_feed)(struct dvb_demux_feed *),
void *priv);
int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
struct dvb_demux *dvbdemux,
struct dmx_frontend *hw_frontend,
struct dmx_frontend *mem_frontend,
struct dvb_adapter *dvb_adapter);
#endif
/* LocalWords: Endif
*/