Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
This commit is contained in:
@@ -329,7 +329,7 @@ static int startmicrocode(struct cosa_data *cosa, int address);
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static int readmem(struct cosa_data *cosa, char __user *data, int addr, int len);
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static int cosa_reset_and_read_id(struct cosa_data *cosa, char *id);
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/* Auxilliary functions */
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/* Auxiliary functions */
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static int get_wait_data(struct cosa_data *cosa);
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static int put_wait_data(struct cosa_data *cosa, int data);
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static int puthexnumber(struct cosa_data *cosa, int number);
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@@ -56,7 +56,7 @@
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* IV. Notes
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* The current error (XDU, RFO) recovery code is untested.
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* So far, RDO takes his RX channel down and the right sequence to enable it
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* again is still a mistery. If RDO happens, plan a reboot. More details
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* again is still a mystery. If RDO happens, plan a reboot. More details
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* in the code (NB: as this happens, TX still works).
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* Don't mess the cables during operation, especially on DTE ports. I don't
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* suggest it for DCE either but at least one can get some messages instead
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@@ -1065,7 +1065,7 @@ static int dscc4_open(struct net_device *dev)
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/*
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* Due to various bugs, there is no way to reliably reset a
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* specific port (manufacturer's dependant special PCI #RST wiring
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* specific port (manufacturer's dependent special PCI #RST wiring
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* apart: it affects all ports). Thus the device goes in the best
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* silent mode possible at dscc4_close() time and simply claims to
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* be up if it's opened again. It still isn't possible to change
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@@ -1230,9 +1230,9 @@ static inline int dscc4_check_clock_ability(int port)
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* scaling. Of course some rounding may take place.
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* - no high speed mode (40Mb/s). May be trivial to do but I don't have an
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* appropriate external clocking device for testing.
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* - no time-slot/clock mode 5: shameless lazyness.
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* - no time-slot/clock mode 5: shameless laziness.
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*
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* The clock signals wiring can be (is ?) manufacturer dependant. Good luck.
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* The clock signals wiring can be (is ?) manufacturer dependent. Good luck.
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*
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* BIG FAT WARNING: if the device isn't provided enough clocking signal, it
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* won't pass the init sequence. For example, straight back-to-back DTE without
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@@ -15,7 +15,7 @@
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* The hardware does the bus handling to avoid the need for delays between
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* touching control registers.
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*
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* Port B isnt wired (why - beats me)
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* Port B isn't wired (why - beats me)
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*
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* Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
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*/
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@@ -178,7 +178,7 @@
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*
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* The resulting average clock frequency (assuming 33.333 MHz oscillator) is:
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* freq = 66.666 MHz / (A + (B + 1) / (C + 1))
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* minumum freq = 66.666 MHz / (A + 1)
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* minimum freq = 66.666 MHz / (A + 1)
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* maximum freq = 66.666 MHz / A
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*
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* Example: A = 2, B = 2, C = 7, CLOCK_CR register = 2 << 22 | 2 << 12 | 7
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@@ -230,7 +230,7 @@
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#define PKT_PIPE_MODE_WRITE 0x57
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/* HDLC packet status values - desc->status */
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#define ERR_SHUTDOWN 1 /* stop or shutdown occurrance */
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#define ERR_SHUTDOWN 1 /* stop or shutdown occurrence */
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#define ERR_HDLC_ALIGN 2 /* HDLC alignment error */
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#define ERR_HDLC_FCS 3 /* HDLC Frame Check Sum error */
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#define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving
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@@ -24,7 +24,7 @@
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*
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* Linux driver notes:
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* Linux uses the device struct lmc_private to pass private information
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* arround.
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* around.
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*
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* The initialization portion of this driver (the lmc_reset() and the
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* lmc_dec_reset() functions, as well as the led controls and the
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@@ -180,7 +180,7 @@ struct lmc___ctl {
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/*
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* Carefull, look at the data sheet, there's more to this
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* Careful, look at the data sheet, there's more to this
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* structure than meets the eye. It should probably be:
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*
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* struct tulip_desc_t {
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@@ -380,7 +380,7 @@ struct lmc___softc {
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/* CSR6 settings */
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#define OPERATION_MODE 0x00000200 /* Full Duplex */
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#define PROMISC_MODE 0x00000040 /* Promiscuous Mode */
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#define RECIEVE_ALL 0x40000000 /* Recieve All */
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#define RECIEVE_ALL 0x40000000 /* Receive All */
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#define PASS_BAD_FRAMES 0x00000008 /* Pass Bad Frames */
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/* Dec control registers CSR6 as well */
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@@ -398,7 +398,7 @@ struct lmc___softc {
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#define TULIP_CMD_RECEIVEALL 0x40000000L /* (RW) Receivel all frames? */
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#define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (21140) */
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#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */
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#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (21140) */
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#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Forward (21140) */
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#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */
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#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */
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#define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */
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@@ -542,7 +542,7 @@ static void z8530_dma_tx(struct z8530_channel *chan)
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z8530_tx(chan);
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return;
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}
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/* This shouldnt occur in DMA mode */
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/* This shouldn't occur in DMA mode */
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printk(KERN_ERR "DMA tx - bogus event!\n");
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z8530_tx(chan);
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}
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@@ -1219,7 +1219,7 @@ static const char *z8530_type_name[]={
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* @io: the port value in question
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*
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* Describe a Z8530 in a standard format. We must pass the I/O as
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* the port offset isnt predictable. The main reason for this function
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* the port offset isn't predictable. The main reason for this function
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* is to try and get a common format of report.
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*/
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@@ -1588,7 +1588,7 @@ static void z8530_rx_done(struct z8530_channel *c)
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unsigned long flags;
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/*
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* Complete this DMA. Neccessary to find the length
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* Complete this DMA. Necessary to find the length
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*/
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flags=claim_dma_lock();
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@@ -1657,7 +1657,7 @@ static void z8530_rx_done(struct z8530_channel *c)
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* fifo length for this. Thus we want to flip to the new
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* buffer and then mess around copying and allocating
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* things. For the current case it doesn't matter but
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* if you build a system where the sync irq isnt blocked
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* if you build a system where the sync irq isn't blocked
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* by the kernel IRQ disable then you need only block the
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* sync IRQ for the RT_LOCK area.
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*
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