MIPS: KVM: Convert emulation to use asm/inst.h
Convert various MIPS KVM guest instruction emulation functions to decode instructions (and encode translations) using the union mips_instruction and related enumerations in asm/inst.h rather than #defines and hardcoded values. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:

committed by
Paolo Bonzini

parent
d5cd26bcfc
commit
258f3a2ea9
@@ -972,13 +972,14 @@ unsigned int kvm_mips_config5_wrmask(struct kvm_vcpu *vcpu)
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return mask;
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}
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enum emulation_result kvm_mips_emulate_CP0(u32 inst, u32 *opc, u32 cause,
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enum emulation_result kvm_mips_emulate_CP0(union mips_instruction inst,
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u32 *opc, u32 cause,
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struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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{
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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enum emulation_result er = EMULATE_DONE;
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u32 rt, rd, copz, sel, co_bit, op;
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u32 rt, rd, sel;
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unsigned long curr_pc;
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/*
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@@ -990,16 +991,8 @@ enum emulation_result kvm_mips_emulate_CP0(u32 inst, u32 *opc, u32 cause,
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if (er == EMULATE_FAIL)
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return er;
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copz = (inst >> 21) & 0x1f;
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rt = (inst >> 16) & 0x1f;
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rd = (inst >> 11) & 0x1f;
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sel = inst & 0x7;
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co_bit = (inst >> 25) & 1;
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if (co_bit) {
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op = (inst) & 0xff;
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switch (op) {
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if (inst.co_format.co) {
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switch (inst.co_format.func) {
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case tlbr_op: /* Read indexed TLB entry */
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er = kvm_mips_emul_tlbr(vcpu);
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break;
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@@ -1018,13 +1011,16 @@ enum emulation_result kvm_mips_emulate_CP0(u32 inst, u32 *opc, u32 cause,
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case eret_op:
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er = kvm_mips_emul_eret(vcpu);
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goto dont_update_pc;
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break;
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case wait_op:
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er = kvm_mips_emul_wait(vcpu);
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break;
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}
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} else {
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switch (copz) {
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rt = inst.c0r_format.rt;
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rd = inst.c0r_format.rd;
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sel = inst.c0r_format.sel;
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switch (inst.c0r_format.rs) {
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case mfc_op:
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#ifdef CONFIG_KVM_MIPS_DEBUG_COP0_COUNTERS
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cop0->stat[rd][sel]++;
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@@ -1258,7 +1254,7 @@ enum emulation_result kvm_mips_emulate_CP0(u32 inst, u32 *opc, u32 cause,
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vcpu->arch.gprs[rt] =
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kvm_read_c0_guest_status(cop0);
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/* EI */
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if (inst & 0x20) {
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if (inst.mfmc0_format.sc) {
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kvm_debug("[%#lx] mfmc0_op: EI\n",
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vcpu->arch.pc);
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kvm_set_c0_guest_status(cop0, ST0_IE);
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@@ -1290,7 +1286,7 @@ enum emulation_result kvm_mips_emulate_CP0(u32 inst, u32 *opc, u32 cause,
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break;
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default:
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kvm_err("[%#lx]MachEmulateCP0: unsupported COP0, copz: 0x%x\n",
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vcpu->arch.pc, copz);
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vcpu->arch.pc, inst.c0r_format.rs);
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er = EMULATE_FAIL;
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break;
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}
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@@ -1311,13 +1307,13 @@ dont_update_pc:
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return er;
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}
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enum emulation_result kvm_mips_emulate_store(u32 inst, u32 cause,
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enum emulation_result kvm_mips_emulate_store(union mips_instruction inst,
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u32 cause,
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struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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{
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enum emulation_result er = EMULATE_DO_MMIO;
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u32 op, base, rt;
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s16 offset;
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u32 rt;
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u32 bytes;
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void *data = run->mmio.data;
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unsigned long curr_pc;
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@@ -1331,12 +1327,9 @@ enum emulation_result kvm_mips_emulate_store(u32 inst, u32 cause,
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if (er == EMULATE_FAIL)
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return er;
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rt = (inst >> 16) & 0x1f;
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base = (inst >> 21) & 0x1f;
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offset = (s16)inst;
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op = (inst >> 26) & 0x3f;
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rt = inst.i_format.rt;
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switch (op) {
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switch (inst.i_format.opcode) {
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case sb_op:
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bytes = 1;
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if (bytes > sizeof(run->mmio.data)) {
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@@ -1413,7 +1406,7 @@ enum emulation_result kvm_mips_emulate_store(u32 inst, u32 cause,
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default:
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kvm_err("Store not yet supported (inst=0x%08x)\n",
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inst);
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inst.word);
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er = EMULATE_FAIL;
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break;
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}
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@@ -1425,19 +1418,16 @@ enum emulation_result kvm_mips_emulate_store(u32 inst, u32 cause,
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return er;
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}
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enum emulation_result kvm_mips_emulate_load(u32 inst, u32 cause,
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struct kvm_run *run,
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enum emulation_result kvm_mips_emulate_load(union mips_instruction inst,
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u32 cause, struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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{
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enum emulation_result er = EMULATE_DO_MMIO;
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u32 op, base, rt;
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s16 offset;
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u32 op, rt;
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u32 bytes;
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rt = (inst >> 16) & 0x1f;
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base = (inst >> 21) & 0x1f;
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offset = (s16)inst;
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op = (inst >> 26) & 0x3f;
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rt = inst.i_format.rt;
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op = inst.i_format.opcode;
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vcpu->arch.pending_load_cause = cause;
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vcpu->arch.io_gpr = rt;
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@@ -1524,7 +1514,7 @@ enum emulation_result kvm_mips_emulate_load(u32 inst, u32 cause,
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default:
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kvm_err("Load not yet supported (inst=0x%08x)\n",
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inst);
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inst.word);
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er = EMULATE_FAIL;
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break;
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}
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@@ -1532,8 +1522,8 @@ enum emulation_result kvm_mips_emulate_load(u32 inst, u32 cause,
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return er;
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}
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enum emulation_result kvm_mips_emulate_cache(u32 inst, u32 *opc,
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u32 cause,
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enum emulation_result kvm_mips_emulate_cache(union mips_instruction inst,
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u32 *opc, u32 cause,
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struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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{
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@@ -1554,9 +1544,9 @@ enum emulation_result kvm_mips_emulate_cache(u32 inst, u32 *opc,
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if (er == EMULATE_FAIL)
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return er;
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base = (inst >> 21) & 0x1f;
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op_inst = (inst >> 16) & 0x1f;
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offset = (s16)inst;
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base = inst.i_format.rs;
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op_inst = inst.i_format.rt;
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offset = inst.i_format.simmediate;
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cache = op_inst & CacheOp_Cache;
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op = op_inst & CacheOp_Op;
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@@ -1693,16 +1683,16 @@ enum emulation_result kvm_mips_emulate_inst(u32 cause, u32 *opc,
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struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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{
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union mips_instruction inst;
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enum emulation_result er = EMULATE_DONE;
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u32 inst;
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/* Fetch the instruction. */
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if (cause & CAUSEF_BD)
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opc += 1;
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inst = kvm_get_inst(opc, vcpu);
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inst.word = kvm_get_inst(opc, vcpu);
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switch (((union mips_instruction)inst).r_format.opcode) {
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switch (inst.r_format.opcode) {
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case cop0_op:
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er = kvm_mips_emulate_CP0(inst, opc, cause, run, vcpu);
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break;
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@@ -1727,7 +1717,7 @@ enum emulation_result kvm_mips_emulate_inst(u32 cause, u32 *opc,
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default:
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kvm_err("Instruction emulation not supported (%p/%#x)\n", opc,
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inst);
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inst.word);
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kvm_arch_vcpu_dump_regs(vcpu);
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er = EMULATE_FAIL;
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break;
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@@ -2262,21 +2252,6 @@ enum emulation_result kvm_mips_emulate_msadis_exc(u32 cause,
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return er;
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}
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/* ll/sc, rdhwr, sync emulation */
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#define OPCODE 0xfc000000
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#define BASE 0x03e00000
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#define RT 0x001f0000
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#define OFFSET 0x0000ffff
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#define LL 0xc0000000
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#define SC 0xe0000000
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#define SPEC0 0x00000000
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#define SPEC3 0x7c000000
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#define RD 0x0000f800
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#define FUNC 0x0000003f
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#define SYNC 0x0000000f
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#define RDHWR 0x0000003b
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enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
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struct kvm_run *run,
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struct kvm_vcpu *vcpu)
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@@ -2285,7 +2260,7 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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enum emulation_result er = EMULATE_DONE;
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unsigned long curr_pc;
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u32 inst;
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union mips_instruction inst;
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/*
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* Update PC and hold onto current PC in case there is
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@@ -2300,18 +2275,19 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
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if (cause & CAUSEF_BD)
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opc += 1;
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inst = kvm_get_inst(opc, vcpu);
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inst.word = kvm_get_inst(opc, vcpu);
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if (inst == KVM_INVALID_INST) {
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if (inst.word == KVM_INVALID_INST) {
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kvm_err("%s: Cannot get inst @ %p\n", __func__, opc);
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return EMULATE_FAIL;
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}
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if ((inst & OPCODE) == SPEC3 && (inst & FUNC) == RDHWR) {
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if (inst.r_format.opcode == spec3_op &&
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inst.r_format.func == rdhwr_op) {
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int usermode = !KVM_GUEST_KERNEL_MODE(vcpu);
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int rd = (inst & RD) >> 11;
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int rt = (inst & RT) >> 16;
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int sel = (inst >> 6) & 0x7;
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int rd = inst.r_format.rd;
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int rt = inst.r_format.rt;
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int sel = inst.r_format.re & 0x7;
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/* If usermode, check RDHWR rd is allowed by guest HWREna */
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if (usermode && !(kvm_read_c0_guest_hwrena(cop0) & BIT(rd))) {
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@@ -2352,7 +2328,8 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
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trace_kvm_hwr(vcpu, KVM_TRACE_RDHWR, KVM_TRACE_HWR(rd, sel),
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vcpu->arch.gprs[rt]);
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} else {
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kvm_debug("Emulate RI not supported @ %p: %#x\n", opc, inst);
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kvm_debug("Emulate RI not supported @ %p: %#x\n",
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opc, inst.word);
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goto emulate_ri;
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}
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