IB/qib: Change receive queue/QPN selection
The basic idea is that on SusieQ, the difficult part of mapping QPN to context is handled by the mapping registers so the generic QPN allocation doesn't need to worry about chip specifics. For Monty and Linda, there is no mapping table so the qpt->mask (same as dd->qpn_mask), is used to see if the QPN to context falls within [zero..dd->n_krcv_queues). Signed-off-by: Mike Marciniszyn <mike.marciniszyn@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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committed by
Roland Dreier

parent
19ede2e422
commit
2528ea60f9
@@ -435,7 +435,6 @@ struct qib_qp {
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spinlock_t r_lock; /* used for APM */
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spinlock_t s_lock;
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atomic_t s_dma_busy;
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unsigned processor_id; /* Processor ID QP is bound to */
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u32 s_flags;
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u32 s_cur_size; /* size of send packet in bytes */
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u32 s_len; /* total length of s_sge */
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@@ -813,13 +812,8 @@ extern struct workqueue_struct *qib_cq_wq;
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*/
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static inline void qib_schedule_send(struct qib_qp *qp)
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{
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if (qib_send_ok(qp)) {
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if (qp->processor_id == smp_processor_id())
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queue_work(qib_wq, &qp->s_work);
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else
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queue_work_on(qp->processor_id,
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qib_wq, &qp->s_work);
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}
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if (qib_send_ok(qp))
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queue_work(qib_wq, &qp->s_work);
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}
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static inline int qib_pkey_ok(u16 pkey1, u16 pkey2)
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