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clk: tegra: Add aclk

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This clock clocks the ADSP Cortex-A9.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Peter De Schrijver
2017-02-28 16:37:22 +02:00
committed by Thierry Reding
parent e827ba1840
commit 24c3ebef1a
2 changed files with 12 additions and 0 deletions
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2
include/dt-bindings/clock/tegra210-car.h
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@@ -396,6 +396,8 @@
#define TEGRA210_CLK_PLL_C_UD 364
#define TEGRA210_CLK_SCLK_MUX 365
#define TEGRA210_CLK_ACLK 370
#define TEGRA210_CLK_DMIC1_SYNC_CLK 388
#define TEGRA210_CLK_DMIC1_SYNC_CLK_MUX 389
#define TEGRA210_CLK_DMIC2_SYNC_CLK 390