Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking updates from Ingo Molnar: "So we have a laundry list of locking subsystem changes: - continuing barrier API and code improvements - futex enhancements - atomics API improvements - pvqspinlock enhancements: in particular lock stealing and adaptive spinning - qspinlock micro-enhancements" * 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: futex: Allow FUTEX_CLOCK_REALTIME with FUTEX_WAIT op futex: Cleanup the goto confusion in requeue_pi() futex: Remove pointless put_pi_state calls in requeue() futex: Document pi_state refcounting in requeue code futex: Rename free_pi_state() to put_pi_state() futex: Drop refcount if requeue_pi() acquired the rtmutex locking/barriers, arch: Remove ambiguous statement in the smp_store_mb() documentation lcoking/barriers, arch: Use smp barriers in smp_store_release() locking/cmpxchg, arch: Remove tas() definitions locking/pvqspinlock: Queue node adaptive spinning locking/pvqspinlock: Allow limited lock stealing locking/pvqspinlock: Collect slowpath lock statistics sched/core, locking: Document Program-Order guarantees locking, sched: Introduce smp_cond_acquire() and use it locking/pvqspinlock, x86: Optimize the PV unlock code path locking/qspinlock: Avoid redundant read of next pointer locking/qspinlock: Prefetch the next node cacheline locking/qspinlock: Use _acquire/_release() versions of cmpxchg() & xchg() atomics: Add test for atomic operations with _relaxed variants
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@@ -93,7 +93,7 @@
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#endif /* CONFIG_SMP */
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#ifndef smp_store_mb
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#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); mb(); } while (0)
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#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)
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#endif
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#ifndef smp_mb__before_atomic
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@@ -12,8 +12,9 @@
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* GNU General Public License for more details.
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*
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* (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
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* (C) Copyright 2015 Hewlett-Packard Enterprise Development LP
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*
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* Authors: Waiman Long <waiman.long@hp.com>
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* Authors: Waiman Long <waiman.long@hpe.com>
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*/
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#ifndef __ASM_GENERIC_QSPINLOCK_H
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#define __ASM_GENERIC_QSPINLOCK_H
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@@ -62,7 +63,7 @@ static __always_inline int queued_spin_is_contended(struct qspinlock *lock)
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static __always_inline int queued_spin_trylock(struct qspinlock *lock)
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{
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if (!atomic_read(&lock->val) &&
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(atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) == 0))
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(atomic_cmpxchg_acquire(&lock->val, 0, _Q_LOCKED_VAL) == 0))
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return 1;
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return 0;
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}
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@@ -77,7 +78,7 @@ static __always_inline void queued_spin_lock(struct qspinlock *lock)
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{
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u32 val;
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val = atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL);
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val = atomic_cmpxchg_acquire(&lock->val, 0, _Q_LOCKED_VAL);
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if (likely(val == 0))
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return;
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queued_spin_lock_slowpath(lock, val);
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@@ -93,7 +94,7 @@ static __always_inline void queued_spin_unlock(struct qspinlock *lock)
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/*
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* smp_mb__before_atomic() in order to guarantee release semantics
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*/
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smp_mb__before_atomic_dec();
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smp_mb__before_atomic();
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atomic_sub(_Q_LOCKED_VAL, &lock->val);
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}
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#endif
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