Merge tag 'v5.2-rc5' into sched/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
此提交包含在:
@@ -28,7 +28,10 @@ obj-y += cpuid-deps.o
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obj-$(CONFIG_PROC_FS) += proc.o
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obj-$(CONFIG_X86_FEATURE_NAMES) += capflags.o powerflags.o
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obj-$(CONFIG_CPU_SUP_INTEL) += intel.o intel_pconfig.o intel_epb.o
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ifdef CONFIG_CPU_SUP_INTEL
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obj-y += intel.o intel_pconfig.o
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obj-$(CONFIG_PM) += intel_epb.o
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endif
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obj-$(CONFIG_CPU_SUP_AMD) += amd.o
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obj-$(CONFIG_CPU_SUP_HYGON) += hygon.o
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obj-$(CONFIG_CPU_SUP_CYRIX_32) += cyrix.o
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@@ -1,11 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* x86 APERF/MPERF KHz calculation for
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* /sys/.../cpufreq/scaling_cur_freq
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*
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* Copyright (C) 2017 Intel Corp.
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* Author: Len Brown <len.brown@intel.com>
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*
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* This file is licensed under GPLv2.
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*/
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#include <linux/delay.h>
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@@ -97,7 +97,6 @@ static void intel_epb_restore(void)
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wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, (epb & ~EPB_MASK) | val);
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}
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#ifdef CONFIG_PM
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static struct syscore_ops intel_epb_syscore_ops = {
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.suspend = intel_epb_save,
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.resume = intel_epb_restore,
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@@ -194,25 +193,6 @@ static int intel_epb_offline(unsigned int cpu)
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return 0;
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}
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static inline void register_intel_ebp_syscore_ops(void)
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{
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register_syscore_ops(&intel_epb_syscore_ops);
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}
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#else /* !CONFIG_PM */
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static int intel_epb_online(unsigned int cpu)
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{
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intel_epb_restore();
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return 0;
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}
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static int intel_epb_offline(unsigned int cpu)
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{
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return intel_epb_save();
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}
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static inline void register_intel_ebp_syscore_ops(void) {}
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#endif
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static __init int intel_epb_init(void)
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{
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int ret;
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@@ -226,7 +206,7 @@ static __init int intel_epb_init(void)
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if (ret < 0)
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goto err_out_online;
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register_intel_ebp_syscore_ops();
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register_syscore_ops(&intel_epb_syscore_ops);
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return 0;
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err_out_online:
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@@ -1,8 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* (c) 2005-2016 Advanced Micro Devices, Inc.
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* Your use of this code is subject to the terms and conditions of the
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* GNU general public license version 2. See "COPYING" or
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* http://www.gnu.org/licenses/gpl.html
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*
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* Written by Jacob Shin - AMD, Inc.
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* Maintained by: Borislav Petkov <bp@alien8.de>
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Bridge between MCE and APEI
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*
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@@ -13,19 +14,6 @@
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*
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* Copyright 2010 Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/export.h>
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@@ -1,10 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MCE event pool management in MCE context
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*
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* Copyright (C) 2015 Intel Corp.
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* Author: Chen, Gong <gong.chen@linux.intel.com>
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*
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* This file is licensed under GPLv2.
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*/
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#include <linux/smp.h>
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#include <linux/mm.h>
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@@ -1,12 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MCE grading rules.
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* Copyright 2008, 2009 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*
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* Author: Andi Kleen
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*/
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#include <linux/kernel.h>
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AMD CPU Microcode Update Driver for Linux
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*
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@@ -17,9 +18,6 @@
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*
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* Author: Jacob Shin <jacob.shin@amd.com>
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* Fixes: Borislav Petkov <bp@suse.de>
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*
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* Licensed under the terms of the GNU General Public
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* License version 2. See file COPYING for details.
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*/
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#define pr_fmt(fmt) "microcode: " fmt
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@@ -872,7 +872,7 @@ int __init microcode_init(void)
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goto out_ucode_group;
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register_syscore_ops(&mc_syscore_ops);
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cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
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cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:online",
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mc_cpu_online, mc_cpu_down_prep);
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pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
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@@ -1,13 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* HyperV Detection code.
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*
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* Copyright (C) 2010, Novell, Inc.
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* Author : K. Y. Srinivasan <ksrinivasan@novell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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*/
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#include <linux/types.h>
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@@ -1,23 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* This file is part of the Linux kernel.
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*
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* Copyright (c) 2011, Intel Corporation
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* Authors: Fenghua Yu <fenghua.yu@intel.com>,
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* H. Peter Anvin <hpa@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <asm/processor.h>
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Resource Director Technology(RDT)
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* - Cache Allocation code.
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@@ -9,15 +10,6 @@
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* Tony Luck <tony.luck@intel.com>
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* Vikas Shivappa <vikas.shivappa@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* More information about RDT be found in the Intel (R) x86 Architecture
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* Software Developer Manual June 2016, volume 3, section 17.17.
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*/
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Resource Director Technology(RDT)
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* - Cache Allocation code.
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@@ -8,15 +9,6 @@
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* Fenghua Yu <fenghua.yu@intel.com>
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* Tony Luck <tony.luck@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* More information about RDT be found in the Intel (R) x86 Architecture
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* Software Developer Manual June 2016, volume 3, section 17.17.
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*/
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Resource Director Technology(RDT)
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* - Monitoring code
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@@ -10,15 +11,6 @@
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* This replaces the cqm.c based on perf but we reuse a lot of
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* code and datastructures originally from Peter Zijlstra and Matt Fleming.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* More information about RDT be found in the Intel (R) x86 Architecture
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* Software Developer Manual June 2016, volume 3, section 17.17.
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*/
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@@ -368,6 +360,9 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mbm)
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struct list_head *head;
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struct rdtgroup *entry;
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if (!is_mbm_local_enabled())
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return;
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r_mba = &rdt_resources_all[RDT_RESOURCE_MBA];
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closid = rgrp->closid;
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rmid = rgrp->mon.rmid;
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@@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* User interface for Resource Alloction in Resource Director Technology(RDT)
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*
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@@ -5,15 +6,6 @@
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*
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* Author: Fenghua Yu <fenghua.yu@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* More information about RDT be found in the Intel (R) x86 Architecture
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* Software Developer Manual.
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*/
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@@ -2542,7 +2534,12 @@ static int __init_one_rdt_domain(struct rdt_domain *d, struct rdt_resource *r,
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if (closid_allocated(i) && i != closid) {
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mode = rdtgroup_mode_by_closid(i);
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if (mode == RDT_MODE_PSEUDO_LOCKSETUP)
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break;
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/*
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* ctrl values for locksetup aren't relevant
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* until the schemata is written, and the mode
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* becomes RDT_MODE_PSEUDO_LOCKED.
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*/
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continue;
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/*
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* If CDP is active include peer domain's
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* usage to ensure there is no overlap
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