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drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4)

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v2: write clk registers only once!
v3: update cg scratch register properly
v4: add TN support

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2013-04-08 12:41:32 +02:00
parent 7062ab67d4
commit 23d33ba32b
4 changed files with 60 additions and 0 deletions
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10
drivers/gpu/drm/radeon/evergreend.h
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@@ -53,6 +53,16 @@
#define RCU_IND_INDEX 0x100
#define RCU_IND_DATA 0x104
/* fusion uvd clocks */
#define CG_DCLK_CNTL 0x610
# define DCLK_DIVIDER_MASK 0x7f
# define DCLK_DIR_CNTL_EN (1 << 8)
#define CG_DCLK_STATUS 0x614
# define DCLK_STATUS (1 << 0)
#define CG_VCLK_CNTL 0x618
#define CG_VCLK_STATUS 0x61c
#define CG_SCRATCH1 0x820
#define GRBM_GFX_INDEX 0x802C
#define INSTANCE_INDEX(x) ((x) << 0)
#define SE_INDEX(x) ((x) << 16)