gianfar: Add flow control support
eTSEC has Rx and Tx flow control capabilities that may be enabled through MACCFG1[Rx_Flow, Tx_Flow] bits. These bits must not be set however when eTSEC is operated in Half-Duplex mode. Unfortunately, the driver currently sets these bits unconditionally. This patch adds the proper handling of the PAUSE frame capability register bits by implementing the ethtool -A interface. When pause autoneg is enabled, the controller uses the phy's capability to negotiate PAUSE frame settings with the link partner and reconfigures its Rx_Flow and Tx_Flow settings to match the capabilities of the link partner. If pause autoneg is off, the PAUSE frame generation may be forced manually (ethtool -A). Flow control is disabled by default now. This implementation is inspired by the tg3 driver. Signed-off-by: Lutz Jaenicke <ljaenicke@innominate.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
ebd8b934e2
commit
23402bddf9
@@ -146,6 +146,10 @@ extern const char gfar_driver_version[];
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| SUPPORTED_Autoneg \
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| SUPPORTED_MII)
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#define GFAR_SUPPORTED_GBIT (SUPPORTED_1000baseT_Full \
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| SUPPORTED_Pause \
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| SUPPORTED_Asym_Pause)
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/* TBI register addresses */
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#define MII_TBICON 0x11
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@@ -1100,7 +1104,11 @@ struct gfar_private {
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/* Wake-on-LAN enabled */
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wol_en:1,
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/* Enable priorty based Tx scheduling in Hw */
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prio_sched_en:1;
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prio_sched_en:1,
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/* Flow control flags */
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pause_aneg_en:1,
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tx_pause_en:1,
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rx_pause_en:1;
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/* The total tx and rx ring size for the enabled queues */
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unsigned int total_tx_ring_size;
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