serial: xilinx_uartps: Get clock rate info from dts
Add support for specifying clock information for the uart clk via the device tree. This eliminates the need to hardcode rates in the device tree. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman

parent
1f9db0921f
commit
2326669ccb
@@ -17,6 +17,7 @@
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/console.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/of.h>
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@@ -936,16 +937,18 @@ static int xuartps_probe(struct platform_device *pdev)
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int rc;
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struct uart_port *port;
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struct resource *res, *res2;
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int clk = 0;
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struct clk *clk;
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const unsigned int *prop;
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prop = of_get_property(pdev->dev.of_node, "clock", NULL);
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if (prop)
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clk = be32_to_cpup(prop);
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if (!clk) {
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clk = of_clk_get(pdev->dev.of_node, 0);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "no clock specified\n");
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return -ENODEV;
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return PTR_ERR(clk);
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}
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rc = clk_prepare_enable(clk);
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if (rc) {
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dev_err(&pdev->dev, "could not enable clock\n");
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return -EBUSY;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@@ -970,7 +973,8 @@ static int xuartps_probe(struct platform_device *pdev)
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port->mapbase = res->start;
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port->irq = res2->start;
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port->dev = &pdev->dev;
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port->uartclk = clk;
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port->uartclk = clk_get_rate(clk);
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port->private_data = clk;
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dev_set_drvdata(&pdev->dev, port);
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rc = uart_add_one_port(&xuartps_uart_driver, port);
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if (rc) {
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@@ -992,14 +996,14 @@ static int xuartps_probe(struct platform_device *pdev)
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static int xuartps_remove(struct platform_device *pdev)
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{
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struct uart_port *port = dev_get_drvdata(&pdev->dev);
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int rc = 0;
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struct clk *clk = port->private_data;
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int rc;
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/* Remove the xuartps port from the serial core */
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if (port) {
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rc = uart_remove_one_port(&xuartps_uart_driver, port);
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dev_set_drvdata(&pdev->dev, NULL);
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port->mapbase = 0;
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}
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rc = uart_remove_one_port(&xuartps_uart_driver, port);
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dev_set_drvdata(&pdev->dev, NULL);
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port->mapbase = 0;
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clk_disable_unprepare(clk);
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return rc;
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}
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