IB/hfi1: Use a common pad buffer for 9B and 16B packets
There is no reason for a different pad buffer for the two
packet types.
Expand the current buffer allocation to allow for both
packet types.
Fixes: f8195f3b14
("IB/hfi1: Eliminate allocation while atomic")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Kaike Wan <kaike.wan@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Link: https://lore.kernel.org/r/20191004204934.26838.13099.stgit@awfm-01.aw.intel.com
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
@@ -147,9 +147,6 @@ static int pio_wait(struct rvt_qp *qp,
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/* Length of buffer to create verbs txreq cache name */
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#define TXREQ_NAME_LEN 24
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/* 16B trailing buffer */
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static const u8 trail_buf[MAX_16B_PADDING];
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static uint wss_threshold = 80;
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module_param(wss_threshold, uint, S_IRUGO);
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MODULE_PARM_DESC(wss_threshold, "Percentage (1-100) of LLC to use as a threshold for a cacheless copy");
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@@ -820,8 +817,8 @@ static int build_verbs_tx_desc(
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/* add icrc, lt byte, and padding to flit */
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if (extra_bytes)
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ret = sdma_txadd_kvaddr(sde->dd, &tx->txreq,
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(void *)trail_buf, extra_bytes);
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ret = sdma_txadd_daddr(sde->dd, &tx->txreq,
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sde->dd->sdma_pad_phys, extra_bytes);
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bail_txadd:
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return ret;
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@@ -1089,7 +1086,8 @@ int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
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}
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/* add icrc, lt byte, and padding to flit */
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if (extra_bytes)
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seg_pio_copy_mid(pbuf, trail_buf, extra_bytes);
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seg_pio_copy_mid(pbuf, ppd->dd->sdma_pad_dma,
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extra_bytes);
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seg_pio_copy_end(pbuf);
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}
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