ide: pass command to ide_map_sg()
* Set IDE_TFLAG_WRITE flag and ->rq also for ATA_CMD_PACKET commands. * Pass command to ->dma_setup method and update all its implementations accordingly. * Pass command instead of request to ide_build_sglist(), *_build_dmatable() and ide_map_sg(). While at it: * Fix scc_dma_setup() documentation + use ATA_DMA_WR define. * Rename sgiioc4_build_dma_table() to sgiioc4_build_dmatable(), change return value type to 'int' and drop unused 'ddir' argument. * Do some minor cleanups in [tx4939]ide_dma_setup(). There should be no functional changes caused by this patch. Acked-by: Borislav Petkov <petkovbb@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@@ -232,7 +232,7 @@ static u8 tx4939ide_clear_dma_status(void __iomem *base)
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#ifdef __BIG_ENDIAN
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/* custom ide_build_dmatable to handle swapped layout */
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static int tx4939ide_build_dmatable(ide_drive_t *drive, struct request *rq)
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static int tx4939ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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u32 *table = (u32 *)hwif->dmatable_cpu;
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@@ -240,7 +240,7 @@ static int tx4939ide_build_dmatable(ide_drive_t *drive, struct request *rq)
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int i;
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struct scatterlist *sg;
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for_each_sg(hwif->sg_table, sg, hwif->cmd.sg_nents, i) {
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for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {
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u32 cur_addr, cur_len, bcount;
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cur_addr = sg_dma_address(sg);
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@@ -287,23 +287,15 @@ use_pio_instead:
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#define tx4939ide_build_dmatable ide_build_dmatable
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#endif
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static int tx4939ide_dma_setup(ide_drive_t *drive)
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static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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void __iomem *base = TX4939IDE_BASE(hwif);
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struct request *rq = hwif->rq;
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u8 reading;
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int nent;
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if (rq_data_dir(rq))
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reading = 0;
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else
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reading = ATA_DMA_WR;
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u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;
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/* fall back to PIO! */
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nent = tx4939ide_build_dmatable(drive, rq);
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if (!nent) {
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ide_map_sg(drive, rq);
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if (tx4939ide_build_dmatable(drive, cmd) == 0) {
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ide_map_sg(drive, cmd);
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return 1;
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}
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@@ -311,7 +303,7 @@ static int tx4939ide_dma_setup(ide_drive_t *drive)
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tx4939ide_writel(hwif->dmatable_dma, base, TX4939IDE_PRD_Ptr);
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/* specify r/w */
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tx4939ide_writeb(reading, base, TX4939IDE_DMA_Cmd);
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tx4939ide_writeb(rw, base, TX4939IDE_DMA_Cmd);
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/* clear INTR & ERROR flags */
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tx4939ide_clear_dma_status(base);
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@@ -320,7 +312,9 @@ static int tx4939ide_dma_setup(ide_drive_t *drive)
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tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ?
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TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1);
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tx4939ide_writew(rq->nr_sectors, base, TX4939IDE_Sec_Cnt);
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tx4939ide_writew(cmd->rq->nr_sectors, base, TX4939IDE_Sec_Cnt);
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return 0;
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}
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