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mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c

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Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
This commit is contained in:
Boris Brezillon
2016-06-08 10:42:23 +02:00
parent 10d4e75c36
commit 229204da53
5 changed files with 55 additions and 18 deletions
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18
drivers/mtd/nand/nand_base.c
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@@ -3825,8 +3825,6 @@ EXPORT_SYMBOL_GPL(nand_decode_ext_id);
static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
{
struct mtd_info *mtd = nand_to_mtd(chip);
u8 *id_data = chip->id.data;
int maf_id = id_data[0];
mtd->erasesize = type->erasesize;
mtd->writesize = type->pagesize;
@@ -3834,19 +3832,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
/* All legacy ID NAND are small-page, SLC */
chip->bits_per_cell = 1;
/*
* Check for Spansion/AMD ID + repeating 5th, 6th byte since
* some Spansion chips have erasesize that conflicts with size
* listed in nand_ids table.
* Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
*/
if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
&& id_data[6] == 0x00 && id_data[7] == 0x00
&& mtd->writesize == 512) {
mtd->erasesize = 128 * 1024;
mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
}
}
/*
@@ -3872,8 +3857,7 @@ static void nand_decode_bbm_options(struct nand_chip *chip)
* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
* AMD/Spansion, and Macronix. All others scan only the first page.
*/
if (nand_is_slc(chip) &&
(maf_id == NAND_MFR_AMD || maf_id == NAND_MFR_MACRONIX))
if (nand_is_slc(chip) && maf_id == NAND_MFR_MACRONIX)
chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
}