Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Paolo Bonzini: - ARM: GICv3 ITS emulation and various fixes. Removal of the old VGIC implementation. - s390: support for trapping software breakpoints, nested virtualization (vSIE), the STHYI opcode, initial extensions for CPU model support. - MIPS: support for MIPS64 hosts (32-bit guests only) and lots of cleanups, preliminary to this and the upcoming support for hardware virtualization extensions. - x86: support for execute-only mappings in nested EPT; reduced vmexit latency for TSC deadline timer (by about 30%) on Intel hosts; support for more than 255 vCPUs. - PPC: bugfixes. * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (302 commits) KVM: PPC: Introduce KVM_CAP_PPC_HTM MIPS: Select HAVE_KVM for MIPS64_R{2,6} MIPS: KVM: Reset CP0_PageMask during host TLB flush MIPS: KVM: Fix ptr->int cast via KVM_GUEST_KSEGX() MIPS: KVM: Sign extend MFC0/RDHWR results MIPS: KVM: Fix 64-bit big endian dynamic translation MIPS: KVM: Fail if ebase doesn't fit in CP0_EBase MIPS: KVM: Use 64-bit CP0_EBase when appropriate MIPS: KVM: Set CP0_Status.KX on MIPS64 MIPS: KVM: Make entry code MIPS64 friendly MIPS: KVM: Use kmap instead of CKSEG0ADDR() MIPS: KVM: Use virt_to_phys() to get commpage PFN MIPS: Fix definition of KSEGX() for 64-bit KVM: VMX: Add VMCS to CPU's loaded VMCSs before VMPTRLD kvm: x86: nVMX: maintain internal copy of current VMCS KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures KVM: arm64: vgic-its: Simplify MAPI error handling KVM: arm64: vgic-its: Make vgic_its_cmd_handle_mapi similar to other handlers KVM: arm64: vgic-its: Turn device_id validation into generic ID validation ...
このコミットが含まれているのは:
@@ -112,34 +112,76 @@
|
||||
#define GICR_WAKER_ProcessorSleep (1U << 1)
|
||||
#define GICR_WAKER_ChildrenAsleep (1U << 2)
|
||||
|
||||
#define GICR_PROPBASER_NonShareable (0U << 10)
|
||||
#define GICR_PROPBASER_InnerShareable (1U << 10)
|
||||
#define GICR_PROPBASER_OuterShareable (2U << 10)
|
||||
#define GICR_PROPBASER_SHAREABILITY_MASK (3UL << 10)
|
||||
#define GICR_PROPBASER_nCnB (0U << 7)
|
||||
#define GICR_PROPBASER_nC (1U << 7)
|
||||
#define GICR_PROPBASER_RaWt (2U << 7)
|
||||
#define GICR_PROPBASER_RaWb (3U << 7)
|
||||
#define GICR_PROPBASER_WaWt (4U << 7)
|
||||
#define GICR_PROPBASER_WaWb (5U << 7)
|
||||
#define GICR_PROPBASER_RaWaWt (6U << 7)
|
||||
#define GICR_PROPBASER_RaWaWb (7U << 7)
|
||||
#define GICR_PROPBASER_CACHEABILITY_MASK (7U << 7)
|
||||
#define GICR_PROPBASER_IDBITS_MASK (0x1f)
|
||||
#define GIC_BASER_CACHE_nCnB 0ULL
|
||||
#define GIC_BASER_CACHE_SameAsInner 0ULL
|
||||
#define GIC_BASER_CACHE_nC 1ULL
|
||||
#define GIC_BASER_CACHE_RaWt 2ULL
|
||||
#define GIC_BASER_CACHE_RaWb 3ULL
|
||||
#define GIC_BASER_CACHE_WaWt 4ULL
|
||||
#define GIC_BASER_CACHE_WaWb 5ULL
|
||||
#define GIC_BASER_CACHE_RaWaWt 6ULL
|
||||
#define GIC_BASER_CACHE_RaWaWb 7ULL
|
||||
#define GIC_BASER_CACHE_MASK 7ULL
|
||||
#define GIC_BASER_NonShareable 0ULL
|
||||
#define GIC_BASER_InnerShareable 1ULL
|
||||
#define GIC_BASER_OuterShareable 2ULL
|
||||
#define GIC_BASER_SHAREABILITY_MASK 3ULL
|
||||
|
||||
#define GICR_PENDBASER_NonShareable (0U << 10)
|
||||
#define GICR_PENDBASER_InnerShareable (1U << 10)
|
||||
#define GICR_PENDBASER_OuterShareable (2U << 10)
|
||||
#define GICR_PENDBASER_SHAREABILITY_MASK (3UL << 10)
|
||||
#define GICR_PENDBASER_nCnB (0U << 7)
|
||||
#define GICR_PENDBASER_nC (1U << 7)
|
||||
#define GICR_PENDBASER_RaWt (2U << 7)
|
||||
#define GICR_PENDBASER_RaWb (3U << 7)
|
||||
#define GICR_PENDBASER_WaWt (4U << 7)
|
||||
#define GICR_PENDBASER_WaWb (5U << 7)
|
||||
#define GICR_PENDBASER_RaWaWt (6U << 7)
|
||||
#define GICR_PENDBASER_RaWaWb (7U << 7)
|
||||
#define GICR_PENDBASER_CACHEABILITY_MASK (7U << 7)
|
||||
#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \
|
||||
(GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT)
|
||||
|
||||
#define GIC_BASER_SHAREABILITY(reg, type) \
|
||||
(GIC_BASER_##type << reg##_SHAREABILITY_SHIFT)
|
||||
|
||||
#define GICR_PROPBASER_SHAREABILITY_SHIFT (10)
|
||||
#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7)
|
||||
#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56)
|
||||
#define GICR_PROPBASER_SHAREABILITY_MASK \
|
||||
GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK)
|
||||
#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
|
||||
#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
|
||||
#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK
|
||||
|
||||
#define GICR_PROPBASER_InnerShareable \
|
||||
GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)
|
||||
|
||||
#define GICR_PROPBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nCnB)
|
||||
#define GICR_PROPBASER_nC GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, nC)
|
||||
#define GICR_PROPBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWt)
|
||||
#define GICR_PROPBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWt)
|
||||
#define GICR_PROPBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWt)
|
||||
#define GICR_PROPBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WaWb)
|
||||
#define GICR_PROPBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWt)
|
||||
#define GICR_PROPBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWb)
|
||||
|
||||
#define GICR_PROPBASER_IDBITS_MASK (0x1f)
|
||||
|
||||
#define GICR_PENDBASER_SHAREABILITY_SHIFT (10)
|
||||
#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7)
|
||||
#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56)
|
||||
#define GICR_PENDBASER_SHAREABILITY_MASK \
|
||||
GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK)
|
||||
#define GICR_PENDBASER_INNER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
|
||||
#define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
|
||||
#define GICR_PENDBASER_CACHEABILITY_MASK GICR_PENDBASER_INNER_CACHEABILITY_MASK
|
||||
|
||||
#define GICR_PENDBASER_InnerShareable \
|
||||
GIC_BASER_SHAREABILITY(GICR_PENDBASER, InnerShareable)
|
||||
|
||||
#define GICR_PENDBASER_nCnB GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nCnB)
|
||||
#define GICR_PENDBASER_nC GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, nC)
|
||||
#define GICR_PENDBASER_RaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWt)
|
||||
#define GICR_PENDBASER_RaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWt)
|
||||
#define GICR_PENDBASER_WaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWt)
|
||||
#define GICR_PENDBASER_WaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WaWb)
|
||||
#define GICR_PENDBASER_RaWaWt GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWaWt)
|
||||
#define GICR_PENDBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RaWaWb)
|
||||
|
||||
#define GICR_PENDBASER_PTZ BIT_ULL(62)
|
||||
|
||||
/*
|
||||
* Re-Distributor registers, offsets from SGI_base
|
||||
@@ -175,54 +217,83 @@
|
||||
#define GITS_CWRITER 0x0088
|
||||
#define GITS_CREADR 0x0090
|
||||
#define GITS_BASER 0x0100
|
||||
#define GITS_IDREGS_BASE 0xffd0
|
||||
#define GITS_PIDR0 0xffe0
|
||||
#define GITS_PIDR1 0xffe4
|
||||
#define GITS_PIDR2 GICR_PIDR2
|
||||
#define GITS_PIDR4 0xffd0
|
||||
#define GITS_CIDR0 0xfff0
|
||||
#define GITS_CIDR1 0xfff4
|
||||
#define GITS_CIDR2 0xfff8
|
||||
#define GITS_CIDR3 0xfffc
|
||||
|
||||
#define GITS_TRANSLATER 0x10040
|
||||
|
||||
#define GITS_CTLR_ENABLE (1U << 0)
|
||||
#define GITS_CTLR_QUIESCENT (1U << 31)
|
||||
|
||||
#define GITS_TYPER_PLPIS (1UL << 0)
|
||||
#define GITS_TYPER_IDBITS_SHIFT 8
|
||||
#define GITS_TYPER_DEVBITS_SHIFT 13
|
||||
#define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
|
||||
#define GITS_TYPER_PTA (1UL << 19)
|
||||
#define GITS_TYPER_HWCOLLCNT_SHIFT 24
|
||||
|
||||
#define GITS_CBASER_VALID (1UL << 63)
|
||||
#define GITS_CBASER_nCnB (0UL << 59)
|
||||
#define GITS_CBASER_nC (1UL << 59)
|
||||
#define GITS_CBASER_RaWt (2UL << 59)
|
||||
#define GITS_CBASER_RaWb (3UL << 59)
|
||||
#define GITS_CBASER_WaWt (4UL << 59)
|
||||
#define GITS_CBASER_WaWb (5UL << 59)
|
||||
#define GITS_CBASER_RaWaWt (6UL << 59)
|
||||
#define GITS_CBASER_RaWaWb (7UL << 59)
|
||||
#define GITS_CBASER_CACHEABILITY_MASK (7UL << 59)
|
||||
#define GITS_CBASER_NonShareable (0UL << 10)
|
||||
#define GITS_CBASER_InnerShareable (1UL << 10)
|
||||
#define GITS_CBASER_OuterShareable (2UL << 10)
|
||||
#define GITS_CBASER_SHAREABILITY_MASK (3UL << 10)
|
||||
#define GITS_CBASER_VALID (1UL << 63)
|
||||
#define GITS_CBASER_SHAREABILITY_SHIFT (10)
|
||||
#define GITS_CBASER_INNER_CACHEABILITY_SHIFT (59)
|
||||
#define GITS_CBASER_OUTER_CACHEABILITY_SHIFT (53)
|
||||
#define GITS_CBASER_SHAREABILITY_MASK \
|
||||
GIC_BASER_SHAREABILITY(GITS_CBASER, SHAREABILITY_MASK)
|
||||
#define GITS_CBASER_INNER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)
|
||||
#define GITS_CBASER_OUTER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)
|
||||
#define GITS_CBASER_CACHEABILITY_MASK GITS_CBASER_INNER_CACHEABILITY_MASK
|
||||
|
||||
#define GITS_CBASER_InnerShareable \
|
||||
GIC_BASER_SHAREABILITY(GITS_CBASER, InnerShareable)
|
||||
|
||||
#define GITS_CBASER_nCnB GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nCnB)
|
||||
#define GITS_CBASER_nC GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, nC)
|
||||
#define GITS_CBASER_RaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWt)
|
||||
#define GITS_CBASER_RaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWt)
|
||||
#define GITS_CBASER_WaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWt)
|
||||
#define GITS_CBASER_WaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, WaWb)
|
||||
#define GITS_CBASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWaWt)
|
||||
#define GITS_CBASER_RaWaWb GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, RaWaWb)
|
||||
|
||||
#define GITS_BASER_NR_REGS 8
|
||||
|
||||
#define GITS_BASER_VALID (1UL << 63)
|
||||
#define GITS_BASER_INDIRECT (1UL << 62)
|
||||
#define GITS_BASER_nCnB (0UL << 59)
|
||||
#define GITS_BASER_nC (1UL << 59)
|
||||
#define GITS_BASER_RaWt (2UL << 59)
|
||||
#define GITS_BASER_RaWb (3UL << 59)
|
||||
#define GITS_BASER_WaWt (4UL << 59)
|
||||
#define GITS_BASER_WaWb (5UL << 59)
|
||||
#define GITS_BASER_RaWaWt (6UL << 59)
|
||||
#define GITS_BASER_RaWaWb (7UL << 59)
|
||||
#define GITS_BASER_CACHEABILITY_MASK (7UL << 59)
|
||||
#define GITS_BASER_TYPE_SHIFT (56)
|
||||
#define GITS_BASER_VALID (1UL << 63)
|
||||
#define GITS_BASER_INDIRECT (1ULL << 62)
|
||||
|
||||
#define GITS_BASER_INNER_CACHEABILITY_SHIFT (59)
|
||||
#define GITS_BASER_OUTER_CACHEABILITY_SHIFT (53)
|
||||
#define GITS_BASER_INNER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK)
|
||||
#define GITS_BASER_CACHEABILITY_MASK GITS_BASER_INNER_CACHEABILITY_MASK
|
||||
#define GITS_BASER_OUTER_CACHEABILITY_MASK \
|
||||
GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, MASK)
|
||||
#define GITS_BASER_SHAREABILITY_MASK \
|
||||
GIC_BASER_SHAREABILITY(GITS_BASER, SHAREABILITY_MASK)
|
||||
|
||||
#define GITS_BASER_nCnB GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nCnB)
|
||||
#define GITS_BASER_nC GIC_BASER_CACHEABILITY(GITS_BASER, INNER, nC)
|
||||
#define GITS_BASER_RaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWt)
|
||||
#define GITS_BASER_RaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWt)
|
||||
#define GITS_BASER_WaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWt)
|
||||
#define GITS_BASER_WaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, WaWb)
|
||||
#define GITS_BASER_RaWaWt GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWaWt)
|
||||
#define GITS_BASER_RaWaWb GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWaWb)
|
||||
|
||||
#define GITS_BASER_TYPE_SHIFT (56)
|
||||
#define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7)
|
||||
#define GITS_BASER_ENTRY_SIZE_SHIFT (48)
|
||||
#define GITS_BASER_ENTRY_SIZE_SHIFT (48)
|
||||
#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0xff) + 1)
|
||||
#define GITS_BASER_NonShareable (0UL << 10)
|
||||
#define GITS_BASER_InnerShareable (1UL << 10)
|
||||
#define GITS_BASER_OuterShareable (2UL << 10)
|
||||
#define GITS_BASER_SHAREABILITY_SHIFT (10)
|
||||
#define GITS_BASER_SHAREABILITY_MASK (3UL << GITS_BASER_SHAREABILITY_SHIFT)
|
||||
#define GITS_BASER_InnerShareable \
|
||||
GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)
|
||||
#define GITS_BASER_PAGE_SIZE_SHIFT (8)
|
||||
#define GITS_BASER_PAGE_SIZE_4K (0UL << GITS_BASER_PAGE_SIZE_SHIFT)
|
||||
#define GITS_BASER_PAGE_SIZE_16K (1UL << GITS_BASER_PAGE_SIZE_SHIFT)
|
||||
@@ -230,6 +301,7 @@
|
||||
#define GITS_BASER_PAGE_SIZE_MASK (3UL << GITS_BASER_PAGE_SIZE_SHIFT)
|
||||
#define GITS_BASER_PAGES_MAX 256
|
||||
#define GITS_BASER_PAGES_SHIFT (0)
|
||||
#define GITS_BASER_NR_PAGES(r) (((r) & 0xff) + 1)
|
||||
|
||||
#define GITS_BASER_TYPE_NONE 0
|
||||
#define GITS_BASER_TYPE_DEVICE 1
|
||||
@@ -247,7 +319,10 @@
|
||||
*/
|
||||
#define GITS_CMD_MAPD 0x08
|
||||
#define GITS_CMD_MAPC 0x09
|
||||
#define GITS_CMD_MAPVI 0x0a
|
||||
#define GITS_CMD_MAPTI 0x0a
|
||||
/* older GIC documentation used MAPVI for this command */
|
||||
#define GITS_CMD_MAPVI GITS_CMD_MAPTI
|
||||
#define GITS_CMD_MAPI 0x0b
|
||||
#define GITS_CMD_MOVI 0x01
|
||||
#define GITS_CMD_DISCARD 0x0f
|
||||
#define GITS_CMD_INV 0x0c
|
||||
@@ -257,6 +332,22 @@
|
||||
#define GITS_CMD_CLEAR 0x04
|
||||
#define GITS_CMD_SYNC 0x05
|
||||
|
||||
/*
|
||||
* ITS error numbers
|
||||
*/
|
||||
#define E_ITS_MOVI_UNMAPPED_INTERRUPT 0x010107
|
||||
#define E_ITS_MOVI_UNMAPPED_COLLECTION 0x010109
|
||||
#define E_ITS_CLEAR_UNMAPPED_INTERRUPT 0x010507
|
||||
#define E_ITS_MAPD_DEVICE_OOR 0x010801
|
||||
#define E_ITS_MAPC_PROCNUM_OOR 0x010902
|
||||
#define E_ITS_MAPC_COLLECTION_OOR 0x010903
|
||||
#define E_ITS_MAPTI_UNMAPPED_DEVICE 0x010a04
|
||||
#define E_ITS_MAPTI_PHYSICALID_OOR 0x010a06
|
||||
#define E_ITS_INV_UNMAPPED_INTERRUPT 0x010c07
|
||||
#define E_ITS_INVALL_UNMAPPED_COLLECTION 0x010d09
|
||||
#define E_ITS_MOVALL_PROCNUM_OOR 0x010e01
|
||||
#define E_ITS_DISCARD_UNMAPPED_INTERRUPT 0x010f07
|
||||
|
||||
/*
|
||||
* CPU interface registers
|
||||
*/
|
||||
|
新しいイシューから参照
ユーザーをブロックする