powerpc/64s/idle: Move soft interrupt mask logic into C code
This simplifies the asm and fixes irq-off tracing over sleep instructions. Also move powersave_nap check for POWER8 into C code, and move PSSCR register value calculation for POWER9 into C. Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
committed by
Michael Ellerman
Michael Ellerman
parent
42bed04255
commit
2201f994a5
@@ -109,13 +109,9 @@ core_idle_lock_held:
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/*
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* Pass requested state in r3:
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* r3 - PNV_THREAD_NAP/SLEEP/WINKLE in POWER8
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* - Requested STOP state in POWER9
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* - Requested PSSCR value in POWER9
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*
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* To check IRQ_HAPPENED in r4
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* 0 - don't check
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* 1 - check
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*
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* Address to 'rfid' to in r5
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* Address of idle handler to 'rfid' to in r4
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*/
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pnv_powersave_common:
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/* Use r3 to pass state nap/sleep/winkle */
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@@ -131,30 +127,7 @@ pnv_powersave_common:
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std r0,_LINK(r1)
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std r0,_NIP(r1)
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/* Hard disable interrupts */
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mfmsr r9
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rldicl r9,r9,48,1
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rotldi r9,r9,16
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mtmsrd r9,1 /* hard-disable interrupts */
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/* Check if something happened while soft-disabled */
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lbz r0,PACAIRQHAPPENED(r13)
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andi. r0,r0,~PACA_IRQ_HARD_DIS@l
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beq 1f
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cmpwi cr0,r4,0
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beq 1f
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addi r1,r1,INT_FRAME_SIZE
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ld r0,16(r1)
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li r3,0 /* Return 0 (no nap) */
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mtlr r0
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blr
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1: /* We mark irqs hard disabled as this is the state we'll
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* be in when returning and we need to tell arch_local_irq_restore()
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* about it
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*/
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li r0,PACA_IRQ_HARD_DIS
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stb r0,PACAIRQHAPPENED(r13)
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mfmsr r9
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/* We haven't lost state ... yet */
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li r0,0
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@@ -163,8 +136,8 @@ pnv_powersave_common:
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/* Continue saving state */
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SAVE_GPR(2, r1)
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SAVE_NVGPRS(r1)
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mfcr r4
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std r4,_CCR(r1)
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mfcr r5
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std r5,_CCR(r1)
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std r9,_MSR(r1)
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std r1,PACAR1(r13)
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@@ -178,7 +151,7 @@ pnv_powersave_common:
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li r6, MSR_RI
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andc r6, r9, r6
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mtmsrd r6, 1 /* clear RI before setting SRR0/1 */
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mtspr SPRN_SRR0, r5
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mtspr SPRN_SRR0, r4
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mtspr SPRN_SRR1, r7
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rfid
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@@ -322,35 +295,14 @@ lwarx_loop_stop:
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IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)
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_GLOBAL(power7_idle)
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/*
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* Entered with MSR[EE]=0 and no soft-masked interrupts pending.
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* r3 contains desired idle state (PNV_THREAD_NAP/SLEEP/WINKLE).
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*/
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_GLOBAL(power7_idle_insn)
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/* Now check if user or arch enabled NAP mode */
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LOAD_REG_ADDRBASE(r3,powersave_nap)
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lwz r4,ADDROFF(powersave_nap)(r3)
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cmpwi 0,r4,0
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beqlr
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li r3, 1
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/* fall through */
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_GLOBAL(power7_nap)
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mr r4,r3
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li r3,PNV_THREAD_NAP
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LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
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LOAD_REG_ADDR(r4, pnv_enter_arch207_idle_mode)
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b pnv_powersave_common
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/* No return */
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_GLOBAL(power7_sleep)
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li r3,PNV_THREAD_SLEEP
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li r4,1
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LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
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b pnv_powersave_common
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/* No return */
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_GLOBAL(power7_winkle)
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li r3,PNV_THREAD_WINKLE
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li r4,1
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LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
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b pnv_powersave_common
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/* No return */
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#define CHECK_HMI_INTERRUPT \
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mfspr r0,SPRN_SRR1; \
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@@ -372,17 +324,13 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
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20: nop;
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/*
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* r3 - The PSSCR value corresponding to the stop state.
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* r4 - The PSSCR mask corrresonding to the stop state.
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* Entered with MSR[EE]=0 and no soft-masked interrupts pending.
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* r3 contains desired PSSCR register value.
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*/
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_GLOBAL(power9_idle_stop)
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mfspr r5,SPRN_PSSCR
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andc r5,r5,r4
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or r3,r3,r5
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std r3, PACA_REQ_PSSCR(r13)
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mtspr SPRN_PSSCR,r3
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LOAD_REG_ADDR(r5,power_enter_stop)
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li r4,1
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LOAD_REG_ADDR(r4,power_enter_stop)
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b pnv_powersave_common
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/* No return */
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@@ -322,7 +322,8 @@ bool prep_irq_for_idle(void)
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* First we need to hard disable to ensure no interrupt
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* occurs before we effectively enter the low power state
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*/
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hard_irq_disable();
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__hard_irq_disable();
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
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/*
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* If anything happened while we were soft-disabled,
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@@ -347,6 +348,36 @@ bool prep_irq_for_idle(void)
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return true;
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}
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/*
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* This is for idle sequences that return with IRQs off, but the
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* idle state itself wakes on interrupt. Tell the irq tracer that
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* IRQs are enabled for the duration of idle so it does not get long
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* off times. Must be paired with fini_irq_for_idle_irqsoff.
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*/
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bool prep_irq_for_idle_irqsoff(void)
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{
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WARN_ON(!irqs_disabled());
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/*
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* First we need to hard disable to ensure no interrupt
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* occurs before we effectively enter the low power state
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*/
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__hard_irq_disable();
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
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/*
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* If anything happened while we were soft-disabled,
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* we return now and do not enter the low power state.
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*/
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if (lazy_irq_pending())
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return false;
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/* Tell lockdep we are about to re-enable */
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trace_hardirqs_on();
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return true;
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}
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/*
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* Force a replay of the external interrupt handler on this CPU.
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*/
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