Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc updates from David Miller: "Some 32-bit kgdb cleanups from Sam Ravnborg, and a hugepage TLB flush overhead fix on 64-bit from Nitin Gupta" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Reduce TLB flushes during hugepte changes aeroflex/greth: fix warning about unused variable openprom: fix warning sparc32: drop superfluous cast in calls to __nocache_pa() sparc32: fix build with STRICT_MM_TYPECHECKS sparc32: use proper prototype for trapbase sparc32: drop local prototype in kgdb_32 sparc32: drop hardcoding trap_level in kgdb_trap
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@@ -375,7 +375,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t prot)
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#define pgprot_noncached pgprot_noncached
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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static inline pte_t pte_mkhuge(pte_t pte)
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static inline unsigned long __pte_huge_mask(void)
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{
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unsigned long mask;
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@@ -390,8 +390,19 @@ static inline pte_t pte_mkhuge(pte_t pte)
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: "=r" (mask)
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: "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V));
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return __pte(pte_val(pte) | mask);
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return mask;
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}
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static inline pte_t pte_mkhuge(pte_t pte)
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{
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return __pte(pte_val(pte) | __pte_huge_mask());
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}
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static inline bool is_hugetlb_pte(pte_t pte)
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{
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return !!(pte_val(pte) & __pte_huge_mask());
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline pmd_t pmd_mkhuge(pmd_t pmd)
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{
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@@ -403,6 +414,11 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
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return __pmd(pte_val(pte));
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}
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#endif
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#else
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static inline bool is_hugetlb_pte(pte_t pte)
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{
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return false;
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}
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#endif
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static inline pte_t pte_mkdirty(pte_t pte)
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@@ -856,6 +872,19 @@ static inline unsigned long pud_pfn(pud_t pud)
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void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
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pte_t *ptep, pte_t orig, int fullmm);
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static void maybe_tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
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pte_t *ptep, pte_t orig, int fullmm)
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{
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/* It is more efficient to let flush_tlb_kernel_range()
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* handle init_mm tlb flushes.
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*
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* SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
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* and SUN4V pte layout, so this inline test is fine.
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*/
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if (likely(mm != &init_mm) && pte_accessible(mm, orig))
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tlb_batch_add(mm, vaddr, ptep, orig, fullmm);
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}
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#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
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static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
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unsigned long addr,
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@@ -872,15 +901,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t orig = *ptep;
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*ptep = pte;
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/* It is more efficient to let flush_tlb_kernel_range()
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* handle init_mm tlb flushes.
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*
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* SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
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* and SUN4V pte layout, so this inline test is fine.
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*/
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if (likely(mm != &init_mm) && pte_accessible(mm, orig))
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tlb_batch_add(mm, addr, ptep, orig, fullmm);
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maybe_tlb_batch_add(mm, addr, ptep, orig, fullmm);
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}
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#define set_pte_at(mm,addr,ptep,pte) \
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