Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc updates from David Miller: "Some 32-bit kgdb cleanups from Sam Ravnborg, and a hugepage TLB flush overhead fix on 64-bit from Nitin Gupta" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Reduce TLB flushes during hugepte changes aeroflex/greth: fix warning about unused variable openprom: fix warning sparc32: drop superfluous cast in calls to __nocache_pa() sparc32: fix build with STRICT_MM_TYPECHECKS sparc32: use proper prototype for trapbase sparc32: drop local prototype in kgdb_32 sparc32: drop hardcoding trap_level in kgdb_trap
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@@ -43,10 +43,10 @@
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nop;
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#ifdef CONFIG_KGDB
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#define KGDB_TRAP(num) \
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b kgdb_trap_low; \
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rd %psr,%l0; \
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nop; \
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#define KGDB_TRAP(num) \
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mov num, %l7; \
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b kgdb_trap_low; \
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rd %psr,%l0; \
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nop;
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#else
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#define KGDB_TRAP(num) \
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@@ -28,10 +28,10 @@ enum regnames {
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#define NUMREGBYTES ((GDB_CSR + 1) * 4)
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#else
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#define NUMREGBYTES ((GDB_Y + 1) * 8)
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#endif
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struct pt_regs;
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asmlinkage void kgdb_trap(unsigned long trap_level, struct pt_regs *regs);
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#endif
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void arch_kgdb_breakpoint(void);
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@@ -69,7 +69,6 @@ typedef struct { unsigned long iopgprot; } iopgprot_t;
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#define __pte(x) ((pte_t) { (x) } )
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#define __iopte(x) ((iopte_t) { (x) } )
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/* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __ctxd(x) ((ctxd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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@@ -97,7 +96,6 @@ typedef unsigned long iopgprot_t;
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#define __pte(x) (x)
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#define __iopte(x) (x)
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/* #define __pmd(x) (x) */ /* XXX later */
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#define __pgd(x) (x)
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#define __ctxd(x) (x)
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#define __pgprot(x) (x)
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@@ -29,9 +29,9 @@ static inline void free_pgd_fast(pgd_t *pgd)
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static inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
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{
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unsigned long pa = __nocache_pa((unsigned long)pmdp);
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unsigned long pa = __nocache_pa(pmdp);
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set_pte((pte_t *)pgdp, (SRMMU_ET_PTD | (pa >> 4)));
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set_pte((pte_t *)pgdp, __pte((SRMMU_ET_PTD | (pa >> 4))));
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}
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#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD)
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@@ -298,7 +298,7 @@ static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t prot)
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{
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prot &= ~__pgprot(SRMMU_CACHE);
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pgprot_val(prot) &= ~pgprot_val(__pgprot(SRMMU_CACHE));
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return prot;
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}
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@@ -375,7 +375,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t prot)
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#define pgprot_noncached pgprot_noncached
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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static inline pte_t pte_mkhuge(pte_t pte)
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static inline unsigned long __pte_huge_mask(void)
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{
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unsigned long mask;
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@@ -390,8 +390,19 @@ static inline pte_t pte_mkhuge(pte_t pte)
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: "=r" (mask)
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: "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V));
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return __pte(pte_val(pte) | mask);
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return mask;
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}
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static inline pte_t pte_mkhuge(pte_t pte)
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{
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return __pte(pte_val(pte) | __pte_huge_mask());
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}
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static inline bool is_hugetlb_pte(pte_t pte)
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{
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return !!(pte_val(pte) & __pte_huge_mask());
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline pmd_t pmd_mkhuge(pmd_t pmd)
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{
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@@ -403,6 +414,11 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
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return __pmd(pte_val(pte));
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}
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#endif
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#else
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static inline bool is_hugetlb_pte(pte_t pte)
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{
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return false;
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}
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#endif
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static inline pte_t pte_mkdirty(pte_t pte)
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@@ -856,6 +872,19 @@ static inline unsigned long pud_pfn(pud_t pud)
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void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
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pte_t *ptep, pte_t orig, int fullmm);
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static void maybe_tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
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pte_t *ptep, pte_t orig, int fullmm)
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{
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/* It is more efficient to let flush_tlb_kernel_range()
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* handle init_mm tlb flushes.
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*
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* SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
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* and SUN4V pte layout, so this inline test is fine.
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*/
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if (likely(mm != &init_mm) && pte_accessible(mm, orig))
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tlb_batch_add(mm, vaddr, ptep, orig, fullmm);
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}
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#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
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static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
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unsigned long addr,
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@@ -872,15 +901,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t orig = *ptep;
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*ptep = pte;
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/* It is more efficient to let flush_tlb_kernel_range()
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* handle init_mm tlb flushes.
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*
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* SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
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* and SUN4V pte layout, so this inline test is fine.
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*/
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if (likely(mm != &init_mm) && pte_accessible(mm, orig))
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tlb_batch_add(mm, addr, ptep, orig, fullmm);
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maybe_tlb_batch_add(mm, addr, ptep, orig, fullmm);
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}
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#define set_pte_at(mm,addr,ptep,pte) \
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@@ -8,6 +8,7 @@
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#define TLB_BATCH_NR 192
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struct tlb_batch {
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bool huge;
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struct mm_struct *mm;
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unsigned long tlb_nr;
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unsigned long active;
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@@ -16,7 +17,7 @@ struct tlb_batch {
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void flush_tsb_kernel_range(unsigned long start, unsigned long end);
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void flush_tsb_user(struct tlb_batch *tb);
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void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr);
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void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr, bool huge);
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/* TLB flush operations. */
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