Merge tag 'tty-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial patches from Greg Kroah-Hartman: "Here's the big tty/serial driver patches for 3.9-rc1. More tty port rework and fixes from Jiri here, as well as lots of individual serial driver updates and fixes. All of these have been in the linux-next tree for a while." * tag 'tty-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (140 commits) tty: mxser: improve error handling in mxser_probe() and mxser_module_init() serial: imx: fix uninitialized variable warning serial: tegra: assume CONFIG_OF TTY: do not update atime/mtime on read/write lguest: select CONFIG_TTY to build properly. ARM defconfigs: add missing inclusions of linux/platform_device.h fb/exynos: include platform_device.h ARM: sa1100/assabet: include platform_device.h directly serial: imx: Fix recursive locking bug pps: Fix build breakage from decoupling pps from tty tty: Remove ancient hardpps() pps: Additional cleanups in uart_handle_dcd_change pps: Move timestamp read into PPS code proper pps: Don't crash the machine when exiting will do pps: Fix a use-after free bug when unregistering a source. pps: Use pps_lookup_dev to reduce ldisc coupling pps: Add pps_lookup_dev() function tty: serial: uartlite: Support uartlite on big and little endian systems tty: serial: uartlite: Fix sparse and checkpatch warnings serial/arc-uart: Miscll DT related updates (Grant's review comments) ... Fix up trivial conflicts, mostly just due to the TTY config option clashing with the EXPERIMENTAL removal.
This commit is contained in:
@@ -45,6 +45,38 @@
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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clkuart0: uart0 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <1>;
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};
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clkuart1: uart1 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <2>;
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};
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clkuart2: uart2 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <3>;
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};
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clkuart3: uart3 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <4>;
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};
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};
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};
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@@ -83,28 +115,28 @@
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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clocks = <&clkuart0>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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clocks = <&clkuart1>;
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};
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uart@d8210000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8210000 0x1040>;
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interrupts = <47>;
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clocks = <&ref24>;
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clocks = <&clkuart2>;
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};
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uart@d82c0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82c0000 0x1040>;
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interrupts = <50>;
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clocks = <&ref24>;
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clocks = <&clkuart3>;
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};
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rtc@d8100000 {
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@@ -59,6 +59,54 @@
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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clkuart0: uart0 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <1>;
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};
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clkuart1: uart1 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <2>;
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};
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clkuart2: uart2 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <3>;
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};
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clkuart3: uart3 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <4>;
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};
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clkuart4: uart4 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <22>;
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};
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clkuart5: uart5 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <23>;
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};
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};
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};
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@@ -96,42 +144,42 @@
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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clocks = <&clkuart0>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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clocks = <&clkuart1>;
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};
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uart@d8210000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8210000 0x1040>;
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interrupts = <47>;
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clocks = <&ref24>;
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clocks = <&clkuart2>;
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};
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uart@d82c0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82c0000 0x1040>;
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interrupts = <50>;
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clocks = <&ref24>;
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clocks = <&clkuart3>;
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};
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uart@d8370000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8370000 0x1040>;
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interrupts = <31>;
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clocks = <&ref24>;
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clocks = <&clkuart4>;
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};
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uart@d8380000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8380000 0x1040>;
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interrupts = <30>;
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clocks = <&ref24>;
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clocks = <&clkuart5>;
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};
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rtc@d8100000 {
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@@ -75,6 +75,22 @@
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reg = <0x204>;
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};
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clkuart0: uart0 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <1>;
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};
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clkuart1: uart1 {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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clocks = <&ref24>;
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enable-reg = <0x250>;
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enable-bit = <2>;
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};
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arm: arm {
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#clock-cells = <0>;
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compatible = "via,vt8500-device-clock";
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@@ -128,14 +144,14 @@
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&ref24>;
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clocks = <&clkuart0>;
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};
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uart@d82b0000 {
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compatible = "via,vt8500-uart";
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reg = <0xd82b0000 0x1040>;
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interrupts = <33>;
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clocks = <&ref24>;
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clocks = <&clkuart1>;
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};
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rtc@d8100000 {
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@@ -44,14 +44,14 @@
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compatible = "xlnx,xuartps";
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reg = <0xE0000000 0x1000>;
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interrupts = <0 27 4>;
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clock = <50000000>;
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clocks = <&uart_clk 0>;
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};
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uart1: uart@e0001000 {
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compatible = "xlnx,xuartps";
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reg = <0xE0001000 0x1000>;
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interrupts = <0 50 4>;
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clock = <50000000>;
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clocks = <&uart_clk 1>;
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};
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slcr: slcr@f8000000 {
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